mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 15:32:33 +00:00
7054721cf9
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.
Where the majority of devices is using it, also move the serial0
alias to the DTSI.
*) Since GL-USB150 even defines serial0 alias, the missing uart
is probably just a mistake. Anyway, disable it for now so this
patch stays cosmetic.
Apply this to 21.02 as well to remove an unnecessary backporting
pitfall.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 3a4b751110)
319 lines
5.8 KiB
Plaintext
319 lines
5.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
#include "ath79.dtsi"
|
|
|
|
/ {
|
|
compatible = "qca,qca9560";
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200n8";
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "mips,mips74Kc";
|
|
clocks = <&pll ATH79_CLK_CPU>;
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
extosc: ref {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-output-names = "ref";
|
|
clock-frequency = <25000000>;
|
|
};
|
|
|
|
ahb {
|
|
apb {
|
|
ddr_ctrl: memory-controller@18000000 {
|
|
compatible = "qca,qca9560-ddr-controller",
|
|
"qca,ar7240-ddr-controller";
|
|
reg = <0x18000000 0x100>;
|
|
|
|
#qca,ddr-wb-channel-cells = <1>;
|
|
};
|
|
|
|
uart: uart@18020000 {
|
|
compatible = "ns16550a";
|
|
reg = <0x18020000 0x20>;
|
|
|
|
interrupts = <3>;
|
|
|
|
clocks = <&pll ATH79_CLK_REF>;
|
|
clock-names = "uart";
|
|
|
|
reg-io-width = <4>;
|
|
reg-shift = <2>;
|
|
no-loopback-test;
|
|
};
|
|
|
|
gpio: gpio@18040000 {
|
|
compatible = "qca,qca9560-gpio",
|
|
"qca,ar9340-gpio";
|
|
reg = <0x18040000 0x28>;
|
|
|
|
interrupts = <2>;
|
|
ngpios = <24>;
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
pinmux: pinmux@1804002c {
|
|
compatible = "pinctrl-single";
|
|
|
|
reg = <0x1804002c 0x44>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
pinctrl-single,bit-per-mux;
|
|
pinctrl-single,register-width = <32>;
|
|
pinctrl-single,function-mask = <0x1>;
|
|
#pinctrl-cells = <2>;
|
|
|
|
jtag_disable_pins: pinmux_jtag_disable_pins {
|
|
pinctrl-single,bits = <0x40 0x2 0x2>;
|
|
};
|
|
};
|
|
|
|
pll: pll-controller@18050000 {
|
|
compatible = "qca,qca9560-pll", "syscon";
|
|
reg = <0x18050000 0x50>;
|
|
|
|
#clock-cells = <1>;
|
|
clock-output-names = "cpu", "ddr", "ahb";
|
|
|
|
clocks = <&extosc>;
|
|
};
|
|
|
|
wdt: wdt@18060008 {
|
|
compatible = "qca,ar7130-wdt";
|
|
reg = <0x18060008 0x8>;
|
|
|
|
interrupts = <4>;
|
|
|
|
clocks = <&pll ATH79_CLK_AHB>;
|
|
clock-names = "wdt";
|
|
};
|
|
|
|
rst: reset-controller@1806001c {
|
|
compatible = "qca,qca9560-reset",
|
|
"qca,ar7100-reset";
|
|
reg = <0x1806001c 0x4>;
|
|
|
|
#reset-cells = <1>;
|
|
interrupt-parent = <&cpuintc>;
|
|
|
|
intc3: interrupt-controller {
|
|
compatible = "qca,ar9340-intc";
|
|
|
|
interrupt-parent = <&cpuintc>;
|
|
interrupts = <3>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
|
|
qca,int-status-addr = <0xac>;
|
|
qca,pending-bits = <0x1f000>, /* pcie rc */
|
|
<0x1000000>, /* usb1 */
|
|
<0x10000000>; /* usb2 */
|
|
};
|
|
};
|
|
|
|
rst2: reset-controller@180600c0 {
|
|
compatible = "qca,qca9560-reset",
|
|
"qca,ar7100-reset",
|
|
"simple-bus";
|
|
reg = <0x180600c0 0x4>;
|
|
|
|
#reset-cells = <1>;
|
|
};
|
|
};
|
|
|
|
gmac: gmac@18070000 {
|
|
compatible = "qca,qca9560-gmac";
|
|
reg = <0x18070000 0x64>;
|
|
};
|
|
|
|
wmac: wmac@18100000 {
|
|
compatible = "qca,qca9560-wmac";
|
|
reg = <0x18100000 0x10000>;
|
|
|
|
interrupt-parent = <&cpuintc>;
|
|
interrupts = <2>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
pcie: pcie-controller@18250000 {
|
|
compatible = "qcom,ar7240-pci";
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
bus-range = <0x0 0x0>;
|
|
reg = <0x18250000 0x1000>, /* CRP */
|
|
<0x18280000 0x100>, /* CTRL */
|
|
<0x16000000 0x1000>; /* CFG */
|
|
reg-names = "crp_base", "ctrl_base", "cfg_base";
|
|
ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
|
|
0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
|
|
interrupt-parent = <&intc3>;
|
|
interrupts = <0>;
|
|
|
|
resets = <&rst 6>, <&rst 7>;
|
|
reset-names = "hc", "phy";
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
|
|
interrupt-map-mask = <0 0 0 1>;
|
|
interrupt-map = <0 0 0 0 &pcie 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb0: usb@1b000000 {
|
|
compatible = "generic-ehci";
|
|
reg = <0x1b000000 0x1d8>;
|
|
|
|
interrupt-parent = <&intc3>;
|
|
interrupts = <1>;
|
|
|
|
resets = <&rst 5>;
|
|
reset-names = "usb-host";
|
|
|
|
has-transaction-translator;
|
|
caps-offset = <0x100>;
|
|
|
|
phy-names = "usb-phy0";
|
|
phys = <&usb_phy0>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
usb1: usb@1b400000 {
|
|
compatible = "generic-ehci";
|
|
reg = <0x1b400000 0x1d8>;
|
|
|
|
interrupt-parent = <&intc3>;
|
|
interrupts = <2>;
|
|
|
|
resets = <&rst2 5>;
|
|
reset-names = "usb-host";
|
|
|
|
has-transaction-translator;
|
|
caps-offset = <0x100>;
|
|
|
|
phy-names = "usb-phy1";
|
|
phys = <&usb_phy1>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
spi: spi@1f000000 {
|
|
compatible = "qca,ar934x-spi";
|
|
reg = <0x1f000000 0x1c>;
|
|
|
|
clocks = <&pll ATH79_CLK_AHB>;
|
|
|
|
status = "disabled";
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
};
|
|
|
|
usb_phy0: usb-phy {
|
|
compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
|
|
|
|
reset-names = "usb-phy", "usb-suspend-override";
|
|
resets = <&rst 4>, <&rst 3>;
|
|
|
|
#phy-cells = <0>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
usb_phy1: usb-phy {
|
|
compatible = "qca,qca9560-usb-phy", "qca,ar7200-usb-phy";
|
|
|
|
reset-names = "usb-phy", "usb-suspend-override";
|
|
resets = <&rst2 4>, <&rst2 3>;
|
|
|
|
#phy-cells = <0>;
|
|
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
&mdio0 {
|
|
resets = <&rst 22>;
|
|
reset-names = "mdio";
|
|
};
|
|
|
|
ð0 {
|
|
compatible = "qca,qca9560-eth", "syscon";
|
|
|
|
pll-data = <0x03000000 0x00000101 0x00001919>;
|
|
pll-reg = <0 0x48 0>;
|
|
pll-handle = <&pll>;
|
|
|
|
resets = <&rst 9>;
|
|
reset-names = "mac";
|
|
};
|
|
|
|
&mdio1 {
|
|
status = "okay";
|
|
resets = <&rst 23>;
|
|
reset-names = "mdio";
|
|
builtin-switch;
|
|
|
|
builtin_switch: switch0@1f {
|
|
compatible = "qca,ar8229";
|
|
reg = <0x1f>;
|
|
resets = <&rst 8>;
|
|
reset-names = "switch";
|
|
phy-mode = "gmii";
|
|
qca,phy4-mii-enable;
|
|
qca,mib-poll-interval = <500>;
|
|
|
|
mdio-bus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
swphy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
phy-mode = "mii";
|
|
};
|
|
|
|
swphy4: ethernet-phy@4 {
|
|
reg = <4>;
|
|
phy-mode = "mii";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ð1 {
|
|
compatible = "qca,qca9560-eth", "syscon";
|
|
|
|
phy-mode = "gmii";
|
|
|
|
resets = <&rst 13>;
|
|
reset-names = "mac";
|
|
|
|
fixed-link {
|
|
speed = <1000>;
|
|
full-duplex;
|
|
};
|
|
};
|