openwrt/target/linux/ath79/dts/qca955x_zyxel_nbg6x16.dtsi
Adrian Schmutzler 7054721cf9 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Apply this to 21.02 as well to remove an unnecessary backporting
pitfall.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 3a4b751110)
2021-02-25 14:42:11 +01:00

135 lines
2.0 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca955x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
keys: keys {
compatible = "gpio-keys";
wifi {
label = "WiFi on/off button";
linux,code = <KEY_RFKILL>;
linux,input-type = <EV_SW>;
gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
debounce-interval = <60>;
};
wps {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&gpio {
gpio_usb_power: usb_power {
gpio-hog;
gpios = <16 0>;
output-high;
};
};
&mdio0 {
status = "okay";
phy17: ethernet-phy@11 {
reg = <0x11>;
phy-mode = "rgmii-id";
};
switch0@1f {
compatible = "qca,ar8327";
reg = <0x1f>;
qca,ar8327-initvals = <
0x04 0x87600000 /* PORT0 PAD MODE CTRL */
0x0c 0x00080080 /* PORT6 PAD MODE CTRL */
0x10 0x81000080 /* POWER_ON_STRAP */
0x50 0xffb7ffb7 /* LED_CTRL0 */
0x54 0xffb7ffb7 /* LED_CTRL1 */
0x58 0xffb7ffb7 /* LED_CTRL2 */
0x5c 0x03ffff00 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
0x94 0x0000007e /* PORT6 STATUS */
>;
};
};
&mdio1 {
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
phy-mode = "sgmii";
};
};
&eth0 {
status = "okay";
pll-data = <0xa6000000 0x00000101 0x00001616>;
phy-handle = <&phy17>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&eth1 {
status = "okay";
pll-data = <0x03000101 0x00000101 0x00001616>;
phy-handle = <&phy1>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};
&usb_phy0 {
status = "okay";
};
&usb_phy1 {
status = "okay";
};
&usb0 {
status = "okay";
hub_port0: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&usb1 {
status = "okay";
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};