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99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
33 lines
1.0 KiB
Diff
33 lines
1.0 KiB
Diff
From d6cf6473b0aaec455e48bccefe318a98a87b789f Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sat, 28 May 2022 19:04:56 -0500
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Subject: [PATCH 013/117] irqchip/sifive-plic: Support wake IRQs
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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drivers/irqchip/irq-sifive-plic.c | 6 ++++--
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1 file changed, 4 insertions(+), 2 deletions(-)
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--- a/drivers/irqchip/irq-sifive-plic.c
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+++ b/drivers/irqchip/irq-sifive-plic.c
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@@ -187,7 +187,8 @@ static struct irq_chip plic_edge_chip =
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.irq_set_affinity = plic_set_affinity,
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#endif
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.irq_set_type = plic_irq_set_type,
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- .flags = IRQCHIP_AFFINITY_PRE_STARTUP,
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+ .flags = IRQCHIP_SKIP_SET_WAKE |
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+ IRQCHIP_AFFINITY_PRE_STARTUP,
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};
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static struct irq_chip plic_chip = {
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@@ -201,7 +202,8 @@ static struct irq_chip plic_chip = {
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.irq_set_affinity = plic_set_affinity,
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#endif
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.irq_set_type = plic_irq_set_type,
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- .flags = IRQCHIP_ONESHOT_SAFE |
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+ .flags = IRQCHIP_SKIP_SET_WAKE |
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+ IRQCHIP_ONESHOT_SAFE |
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IRQCHIP_EOI_THREADED |
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IRQCHIP_AFFINITY_PRE_STARTUP,
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};
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