openwrt/target/linux/ath79/dts/qca9558_tplink_rex5x.dtsi
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

171 lines
2.9 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca955x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
mdio-gpio0 = &mdio2;
label-mac-device = &eth0;
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "blue:power";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
wlan2g {
label = "blue:wlan2g";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wlan5g {
label = "blue:wlan5g";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
lan_link {
label = "green:lan_link";
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
};
lan_data {
label = "green:lan_data";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
wps_blue {
label = "blue:wps";
gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
};
wps_red {
label = "red:wps";
gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
leds {
label = "LED control button";
linux,code = <BTN_0>;
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
mdio2: mdio {
compatible = "virtual,mdio-gpio";
gpios = <&gpio 3 GPIO_ACTIVE_HIGH>, /* MDC */
<&gpio 1 GPIO_ACTIVE_HIGH>; /* MDIO */
#address-cells = <1>;
#size-cells = <0>;
phy4: ethernet-phy@4 {
reg = <4>;
reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
};
};
&pcie0 {
status = "okay";
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x020000 0x5e0000>;
};
partition@600000 {
label = "partition-table";
reg = <0x600000 0x010000>;
read-only;
};
info: partition@610000 {
label = "info";
reg = <0x610000 0x020000>;
read-only;
};
partition@630000 {
label = "config";
reg = <0x630000 0x1c0000>;
read-only;
};
art: partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&eth0 {
status = "okay";
phy-handle = <&phy4>;
pll-data = <0xa6000000 0x00000101 0x00001616>;
mtd-mac-address = <&info 0x8>;
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&info 0x8>;
mtd-mac-address-increment = <(-1)>;
};