openwrt/target/linux/ath79/dts/qca9533_plasmacloud_pa300.dtsi
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca953x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
chosen {
/delete-property/ bootargs;
};
aliases {
led-boot = &led_status_green;
led-failsafe = &led_status_green;
led-running = &led_status_green;
led-upgrade = &led_status_green;
label-mac-device = &eth0;
};
keys {
compatible = "gpio-keys";
pinctrl-names = "default";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
status_red {
label = "red:status";
gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
};
led_status_green: status_green {
label = "green:status";
gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
};
status_blue {
label = "blue:status";
gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
/* hw_margin_ms is actually 300s but driver limits it to 60s */
hw_margin_ms = <60000>;
always-running;
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
/* partitions are passed via bootloader */
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x040000>;
};
partition@80000 {
label = "custom";
reg = <0x080000 0x140000>;
read-only;
};
partition@1c0000 {
label = "inactive";
reg = <0x1c0000 0x700000>;
};
partition@8c0000 {
label = "inactive2";
reg = <0x8c0000 0x700000>;
};
art: partition@fc0000 {
label = "ART";
reg = <0xfc0000 0x040000>;
read-only;
};
};
};
};
&eth0 {
status = "okay";
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {
/* Workaround: keep the Ethernet interfaces order/mapping correct
* (GMAC0 -> eth0, GMAC1 -> eth1, same as in old ar71xx target)
*/
compatible = "qca,qca9530-eth", "syscon", "simple-mfd";
mtd-mac-address = <&art 0x0>;
mtd-mac-address-increment = <1>;
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&art 0x0>;
mtd-mac-address-increment = <2>;
};