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e3ddfcc70c
Initial conversion to new LED color/function format and drop label format where possible. The same label is composed at runtime. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
137 lines
2.2 KiB
Plaintext
137 lines
2.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include <dt-bindings/leds/common.h>
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#include "qca955x_dlink_dap-2xxx.dtsi"
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/ {
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compatible = "dlink,dap-2695-a1", "qca,qca9558";
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model = "D-link DAP-2695-A1";
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aliases {
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led-boot = &led_power_red;
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led-failsafe = &led_power_red;
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led-running = &led_power_green;
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led-upgrade = &led_power_red;
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};
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leds {
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compatible = "gpio-leds";
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led_power_green: power_green {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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led_power_red: power_red {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_RED>;
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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};
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wifi2g {
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label = "green:wifi2g";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&partitions {
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partition@70000 {
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label = "firmware";
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reg = <0x070000 0xf00000>;
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compatible = "wrg";
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};
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partition@f70000 {
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label = "captival";
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reg = <0xf70000 0x070000>;
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read-only;
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};
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partition@fe0000 {
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label = "certificate";
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reg = <0xfe0000 0x010000>;
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read-only;
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};
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};
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&mdio0 {
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <0>;
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qca,ar8327-initvals = <
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0x04 0x07600000 /* PORT0_PAD_CTRL */
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0x0c 0x00080080 /* PORT6_PAD_CTRL */
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0x7c 0x0000007e /* PORT0_STATUS */
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0x94 0x0000007e /* PORT6_STATUS */
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>;
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};
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};
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ð0 {
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status = "okay";
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phy-handle = <&phy0>;
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pll-data = <0x56000000 0x00000101 0x00001616>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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ð1 {
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status = "okay";
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pll-data = <0x03000101 0x00000101 0x00001616>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&pcie0 {
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status = "okay";
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wifi@0,0 {
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compatible = "qcom,ath10k";
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reg = <0 0 0 0 0>;
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nvmem-cells = <&cal_ath10k>;
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nvmem-cell-names = "calibration";
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};
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};
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&art {
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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cal_ath9k: calibration@1000 {
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reg = <0x1000 0x440>;
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};
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cal_ath10k: calibration@5000 {
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reg = <0x5000 0x844>;
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};
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};
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};
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