mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-26 00:41:17 +00:00
241 lines
5.9 KiB
Diff
241 lines
5.9 KiB
Diff
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -352,6 +352,7 @@
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gpio-ranges = <&qcom_pinmux 0 0 69>;
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#gpio-cells = <2>;
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interrupt-controller;
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+ #address-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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@@ -379,6 +380,7 @@
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function = "pcie3_rst";
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drive-strength = <12>;
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bias-disable;
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+ output-low;
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};
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};
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@@ -411,12 +413,9 @@
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};
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nand_pins: nand_pins {
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- mux {
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+ disable {
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pins = "gpio34", "gpio35", "gpio36",
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- "gpio37", "gpio38", "gpio39",
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- "gpio40", "gpio41", "gpio42",
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- "gpio43", "gpio44", "gpio45",
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- "gpio46", "gpio47";
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+ "gpio37", "gpio38";
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function = "nand";
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drive-strength = <10>;
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bias-disable;
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@@ -424,6 +423,8 @@
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pullups {
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pins = "gpio39";
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+ function = "nand";
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+ drive-strength = <10>;
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bias-pull-up;
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};
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@@ -431,6 +432,8 @@
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pins = "gpio40", "gpio41", "gpio42",
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"gpio43", "gpio44", "gpio45",
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"gpio46", "gpio47";
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+ function = "nand";
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+ drive-strength = <10>;
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bias-bus-hold;
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};
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};
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@@ -439,6 +442,7 @@
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intc: interrupt-controller@2000000 {
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compatible = "qcom,msm-qgic2";
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interrupt-controller;
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+ #address-cells = <0>;
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#interrupt-cells = <3>;
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reg = <0x02000000 0x1000>,
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<0x02002000 0x1000>;
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@@ -468,11 +472,13 @@
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acc0: clock-controller@2088000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
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+ clock-output-names = "acpu0_aux";
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};
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acc1: clock-controller@2098000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
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+ clock-output-names = "acpu1_aux";
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};
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adm_dma: dma-controller@18300000 {
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@@ -496,13 +502,13 @@
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};
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saw0: regulator@2089000 {
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- compatible = "qcom,saw2";
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+ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
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reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
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regulator;
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};
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saw1: regulator@2099000 {
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- compatible = "qcom,saw2";
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+ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
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reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
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regulator;
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};
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@@ -530,7 +536,7 @@
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status = "disabled";
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};
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- i2c@124a0000 {
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+ gsbi2_i2c: i2c@124a0000 {
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compatible = "qcom,i2c-qup-v1.1.1";
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reg = <0x124a0000 0x1000>;
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interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
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@@ -676,9 +682,6 @@
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compatible = "qcom,ipq806x-nand";
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reg = <0x1ac00000 0x800>;
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- pinctrl-0 = <&nand_pins>;
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- pinctrl-names = "default";
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-
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clocks = <&gcc EBI2_CLK>,
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<&gcc EBI2_AON_CLK>;
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clock-names = "core", "aon";
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@@ -733,10 +736,13 @@
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tsens_calib_backup: calib_backup@410 {
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reg = <0x410 0xb>;
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};
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+ speedbin_efuse: speedbin@0c0 {
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+ reg = <0x0c0 0x4>;
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+ };
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};
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gcc: clock-controller@900000 {
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- compatible = "qcom,gcc-ipq8064";
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+ compatible = "qcom,gcc-ipq8064", "syscon";
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reg = <0x00900000 0x4000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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@@ -768,10 +774,45 @@
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clocks = <&gcc RPM_MSG_RAM_H_CLK>;
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clock-names = "ram";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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rpmcc: clock-controller {
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compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
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#clock-cells = <1>;
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};
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+
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+ regulators {
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+ compatible = "qcom,rpm-smb208-regulators";
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+
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+ smb208_s1a: s1a {
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+ regulator-min-microvolt = <1050000>;
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+ regulator-max-microvolt = <1150000>;
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+
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+ qcom,switch-mode-frequency = <1200000>;
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+ };
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+
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+ smb208_s1b: s1b {
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+ regulator-min-microvolt = <1050000>;
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+ regulator-max-microvolt = <1150000>;
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+
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+ qcom,switch-mode-frequency = <1200000>;
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+ };
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+
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+ smb208_s2a: s2a {
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+ regulator-min-microvolt = < 800000>;
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+ regulator-max-microvolt = <1250000>;
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+
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+ qcom,switch-mode-frequency = <1200000>;
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+ };
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+
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+ smb208_s2b: s2b {
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+ regulator-min-microvolt = < 800000>;
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+ regulator-max-microvolt = <1250000>;
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+
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+ qcom,switch-mode-frequency = <1200000>;
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+ };
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+ };
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};
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tcsr: syscon@1a400000 {
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@@ -965,7 +1006,7 @@
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gmac0: ethernet@37000000 {
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device_type = "network";
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- compatible = "qcom,ipq806x-gmac";
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+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
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reg = <0x37000000 0x200000>;
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interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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@@ -989,7 +1030,7 @@
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gmac1: ethernet@37200000 {
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device_type = "network";
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- compatible = "qcom,ipq806x-gmac";
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+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
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reg = <0x37200000 0x200000>;
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interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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@@ -1013,7 +1054,7 @@
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gmac2: ethernet@37400000 {
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device_type = "network";
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- compatible = "qcom,ipq806x-gmac";
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+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
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reg = <0x37400000 0x200000>;
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interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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@@ -1037,7 +1078,7 @@
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gmac3: ethernet@37600000 {
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device_type = "network";
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- compatible = "qcom,ipq806x-gmac";
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+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
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reg = <0x37600000 0x200000>;
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interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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@@ -1065,8 +1106,6 @@
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clocks = <&gcc USB30_0_UTMI_CLK>;
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clock-names = "ref";
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#phy-cells = <0>;
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-
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- status = "disabled";
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};
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ss_phy_0: phy@100f8830 {
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@@ -1075,8 +1114,6 @@
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clocks = <&gcc USB30_0_MASTER_CLK>;
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clock-names = "ref";
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#phy-cells = <0>;
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-
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- status = "disabled";
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};
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usb3_0: usb3@100f8800 {
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@@ -1176,7 +1213,7 @@
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};
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amba: amba {
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- compatible = "simple-bus";
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+ compatible = "arm,amba-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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@@ -1195,7 +1232,6 @@
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non-removable;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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- mmc-ddr-1_8v;
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vmmc-supply = <&vsdcc_fixed>;
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dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
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dma-names = "tx", "rx";
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