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2e4fe289ce
For some reason LS1012A and LS1046A devboards don't work well with Spansion SPI NOR flash. It cause read and write errors like: [ 27.285887] jffs2: Newly-erased block contained word 0xc20031985 at offset 0x025ae000 [ 27.468922] jffs2: Newly-erased block contained word 0x0 at offset 0x02573000 [ 27.502615] jffs2: Newly-erased block contained word 0xe723f41e5823f110 at offset 0x02572000 [ 27.541550] jffs2: Newly-erased block contained word 0x1a7d266ee6 at offset 0x02571000 [ 27.577195] jffs2: Newly-erased block contained word 0x5d000bae8d52fec6 at offset 0x02570000 [ 27.611800] jffs2: Newly-erased block contained word 0x63515aee63515a4b at offset 0x0256f000 [ 27.651749] jffs2: Newly-erased block contained word 0xc20031985 at offset 0x0256e000 [ 27.825593] jffs2: Newly-erased block contained word 0xc20031985 at offset 0x0252e000 NXP have found workarround and applied in their vendor kernel version. They force 1x tx and 1x rx lines in qspi. That method fix issues. This patch ports patches from NXP LSDK tree. Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
27 lines
1016 B
Diff
27 lines
1016 B
Diff
From 2b84e88d36de482da0370290ad4af09a71993f08 Mon Sep 17 00:00:00 2001
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From: Han Xu <han.xu@nxp.com>
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Date: Tue, 14 Apr 2020 11:58:44 -0500
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Subject: [PATCH] LF-20-3 mtd: spi-nor: Use 1 bit mode of spansion(s25fs512s)
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flash
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This is a workaround patch which uses only single bit mode of s25fs512s
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flash
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Signed-off-by: Han Xu <han.xu@nxp.com>
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Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
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---
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drivers/mtd/spi-nor/spansion.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/mtd/spi-nor/spansion.c
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+++ b/drivers/mtd/spi-nor/spansion.c
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@@ -62,7 +62,7 @@ static const struct flash_info spansion_
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SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
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USE_CLSR) },
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{ "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256,
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- SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR)
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+ SPI_NOR_4B_OPCODES | USE_CLSR)
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.fixups = &s25fs_s_fixups, },
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{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) },
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{ "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },
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