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f0cc5f6c0a
Backport upstream changes to initialize GDM settings and reset PPE Allow GMAC to recognize the special tag to fix PPE packet parsing Improve GRO performance by passing PPE L4 hash as skb hash Signed-off-by: Felix Fietkau <nbd@nbd.name>
76 lines
2.2 KiB
Diff
76 lines
2.2 KiB
Diff
From: Felix Fietkau <nbd@nbd.name>
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Date: Sun, 13 Sep 2020 08:17:02 +0200
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Subject: [PATCH] net: ethernet: mtk_eth_soc: fix parsing packets in GDM
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When using DSA, set the special tag in GDM ingress control to allow the MAC
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to parse packets properly earlier. This affects rx DMA source port reporting.
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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---
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -19,6 +19,7 @@
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#include <linux/interrupt.h>
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#include <linux/pinctrl/devinfo.h>
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#include <linux/phylink.h>
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+#include <net/dsa.h>
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#include "mtk_eth_soc.h"
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@@ -1240,12 +1241,14 @@ static int mtk_poll_rx(struct napi_struc
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u8 *data, *new_data;
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struct mtk_rx_dma *rxd, trxd;
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int done = 0, bytes = 0;
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+ bool uses_dsa = eth->netdev[0] && netdev_uses_dsa(eth->netdev[0]);
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while (done < budget) {
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struct net_device *netdev;
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unsigned int pktlen;
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dma_addr_t dma_addr;
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int mac;
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+ u16 hash;
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ring = mtk_get_rx_ring(eth);
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if (unlikely(!ring))
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@@ -1259,13 +1262,13 @@ static int mtk_poll_rx(struct napi_struc
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break;
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/* find out which mac the packet come from. values start at 1 */
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- if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
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+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
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mac = 0;
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- } else {
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- mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
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- RX_DMA_FPORT_MASK;
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- mac--;
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- }
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+ else if (uses_dsa)
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+ mac = !(trxd.rxd4 >> 22);
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+ else
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+ mac = ((trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
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+ RX_DMA_FPORT_MASK) - 1;
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if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT ||
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!eth->netdev[mac]))
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@@ -2247,6 +2250,9 @@ static void mtk_gdm_config(struct mtk_et
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val |= config;
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+ if (!i && eth->netdev[0] && netdev_uses_dsa(eth->netdev[0]))
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+ val |= MTK_GDMA_SPECIAL_TAG;
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+
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mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
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}
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/* Reset and enable PSE */
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -82,6 +82,7 @@
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/* GDM Exgress Control Register */
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#define MTK_GDMA_FWD_CFG(x) (0x500 + (x * 0x1000))
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+#define MTK_GDMA_SPECIAL_TAG BIT(24)
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#define MTK_GDMA_ICS_EN BIT(22)
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#define MTK_GDMA_TCS_EN BIT(21)
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#define MTK_GDMA_UCS_EN BIT(20)
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