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2b55c83e68
All compiled device tree files not mentioned are binary identical to the former ones. Fix the obvious decimal/hex confusion for the power key of ramips/M2M.dts. Due to the include of the input binding header, the BTN_* node names in: - ramips/GL-MT300A.dts - ramips/GL-MT300N.dts - ramips/GL-MT750.dts - ramips/Timecloud.dts will be changed by the compiler to the numerical equivalent. Move the binding include of lantiq boards to the file where they are used the first time to hint the user where the values do come from. Signed-off-by: Mathias Kresin <dev@kresin.me>
220 lines
4.1 KiB
Plaintext
220 lines
4.1 KiB
Plaintext
/dts-v1/;
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#include "vr9.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "FRITZ7360SL - 1&1 HomeServer";
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chosen {
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bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
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};
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aliases {
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led-boot = &power_green;
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led-failsafe = &power_red;
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led-running = &power_green;
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led-internet = &info_green;
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led-dsl = &power_green;
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led-wifi = &wifi;
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};
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memory@0 {
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reg = <0x0 0x8000000>;
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};
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fpi@10000000 {
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localbus@0 {
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nor-boot@0 {
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compatible = "lantiq,nor";
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bank-width = <2>;
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reg = <0 0x0 0x1000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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urlader: partition@0 {
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label = "urlader";
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reg = <0x00000 0x20000>;
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read-only;
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};
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partition@20000 {
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label = "firmware";
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reg = <0x20000 0xf60000>;
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};
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partition@f80000 {
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label = "tffs (1)";
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reg = <0xf80000 0x40000>;
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read-only;
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};
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partition@fc0000 {
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label = "tffs (2)";
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reg = <0xfc0000 0x40000>;
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read-only;
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};
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};
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};
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};
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gpio: pinmux@E100B10 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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mdio {
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lantiq,groups = "mdio";
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lantiq,function = "mdio";
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};
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phy-rst {
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lantiq,pins = "io37", "io44";
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lantiq,pull = <2>;
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lantiq,open-drain;
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lantiq,output = <1>;
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};
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pcie-rst {
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lantiq,pins = "io38";
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lantiq,pull = <0>;
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lantiq,output = <1>;
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};
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};
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};
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ifxhcd@E101000 {
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status = "okay";
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lantiq,portmask = <0x3>;
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};
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ifxhcd@E106000 {
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status = "okay";
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};
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};
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ath9k_eep {
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compatible = "ath9k,eeprom";
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ath,eep-flash = <&urlader 0x985>;
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ath,eep-endian;
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ath,eep-swap;
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ath,pci-slot = <0>;
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};
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gphy-xrx200 {
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compatible = "lantiq,phy-xrx200";
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firmware = "lantiq/vr9_phy11g_a2x.bin";
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phys = [ 00 01 ];
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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dect {
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label = "power";
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gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
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linux,code = <BTN_2>;
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};
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wifi {
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label = "wifi";
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gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
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linux,code = <BTN_1>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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power_green: power {
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label = "fritz7360sl:green:power";
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gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
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default-state = "keep";
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};
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power_red: power2 {
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label = "fritz7360sl:red:power";
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gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
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};
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info_red {
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label = "fritz7360sl:red:info";
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gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
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};
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info_green: info_green {
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label = "fritz7360sl:green:info";
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gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
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};
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wifi: wifi {
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label = "fritz7360sl:green:wlan";
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gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
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};
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dect {
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label = "fritz7360sl:green:dect";
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gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
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};
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};
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};
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ð0 {
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lan: interface@0 {
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compatible = "lantiq,xrx200-pdi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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mac-address = [ 00 11 22 33 44 55 ];
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lantiq,switch;
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ethernet@0 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <0>;
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phy-mode = "rmii";
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phy-handle = <&phy0>;
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// gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
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};
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ethernet@1 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <1>;
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phy-mode = "rmii";
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phy-handle = <&phy1>;
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// gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
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};
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ethernet@2 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <2>;
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phy-mode = "gmii";
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phy-handle = <&phy11>;
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};
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ethernet@3 {
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compatible = "lantiq,xrx200-pdi-port";
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reg = <4>;
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phy-mode = "gmii";
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phy-handle = <&phy13>;
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};
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};
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "lantiq,xrx200-mdio";
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phy0: ethernet-phy@0 {
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reg = <0x00>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy1: ethernet-phy@1 {
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reg = <0x01>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy11: ethernet-phy@11 {
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reg = <0x11>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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phy13: ethernet-phy@13 {
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reg = <0x13>;
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compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
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};
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};
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};
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