openwrt/target/linux/ramips/dts/mt7620a_tplink_archer-mr200.dts
Adrian Schmutzler e4ce3109f2 ramips: simplify state_default/pinctrl0 in device DTS files
The node pinctrl0 is already set up in the SOC DTSI files, but
defined again as member of pinctrl in most of the device DTS(I)
files. This patch removes this redundancy for the entire ramips
target.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-12-23 02:24:55 +01:00

201 lines
3.1 KiB
Plaintext

/dts-v1/;
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,archer-mr200", "ralink,mt7620a-soc";
model = "TP-Link Archer MR200";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
bootargs = "console=ttyS0,115200";
};
leds {
compatible = "gpio-leds";
lan {
label = "archer-mr200:white:lan";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
};
wan {
label = "archer-mr200:white:wan";
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
};
led_power: power {
label = "archer-mr200:white:power";
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
};
4g {
label = "archer-mr200:white:4g";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
wps {
label = "archer-mr200:white:wps";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
signal1 {
label = "archer-mr200:white:signal1";
gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
};
signal2 {
label = "archer-mr200:white:signal2";
gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
};
signal3 {
label = "archer-mr200:white:signal3";
gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
};
signal4 {
label = "archer-mr200:white:signal4";
gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
};
wlan {
label = "archer-mr200:white:wlan";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RESTART>;
};
rfkill {
label = "rfkill";
gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RFKILL>;
};
};
gpio_export {
compatible = "gpio-export";
#size-cells = <0>;
power_usb {
gpio-export,name = "power_usb1";
gpio-export,output = <1>;
gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
};
};
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&spi0 {
status = "okay";
m25p80@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x20000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x20000 0x7b0000>;
};
rom: partition@7d0000 {
label = "rom";
reg = <0x7d0000 0x10000>;
read-only;
};
partition@7e0000 {
label = "romfile";
reg = <0x7e0000 0x10000>;
read-only;
};
radio: partition@7f0000 {
label = "radio";
reg = <0x7f0000 0x10000>;
read-only;
};
};
};
};
&state_default {
gpio {
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "nd_sd", "ephy", "spi refclk";
ralink,function = "gpio";
};
};
&ethernet {
mtd-mac-address = <&rom 0xf100>;
mediatek,portmap = "llll";
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
&gsw {
mediatek,port4 = "ephy";
};
&wmac {
ralink,mtd-eeprom = <&radio 0x0>;
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 0x8000>;
};
};