mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-30 10:39:04 +00:00
ca5c695a45
Deleted following upstreamed patches: bcm27xx: 950-0006-drm-vc4-hdmi-Fix-HPD-GPIO-detection.patch bcm27xx: 950-0420-drm-vc4-Adopt-the-dma-configuration-from-the-HVS-or-.patch bcm27xx: 950-0425-drm-vc4-A-present-but-empty-dmas-disables-audio.patch bcm27xx: 950-0432-vc4-drm-Avoid-full-hdmi-audio-fifo-writes.patch bcm27xx: 950-0433-vc4-drm-vc4_plane-Remove-subpixel-positioning-check.patch bcm27xx: 950-0435-drm-vc4-Correct-pixel-order-for-DSI0.patch bcm27xx: 950-0436-drm-vc4-Register-dsi0-as-the-correct-vc4-encoder-typ.patch bcm27xx: 950-0437-drm-vc4-Fix-dsi0-interrupt-support.patch bcm27xx: 950-0438-drm-vc4-Add-correct-stop-condition-to-vc4_dsi_encode.patch bcm27xx: 950-0443-drm-vc4-Fix-timings-for-interlaced-modes.patch bcm27xx: 950-0445-drm-vc4-Fix-margin-calculations-for-the-right-bottom.patch bcm27xx: 950-0475-drm-vc4-Reset-HDMI-MISC_CONTROL-register.patch bcm27xx: 950-0476-drm-vc4-Release-workaround-buffer-and-DMA-in-error-p.patch bcm27xx: 950-0477-drm-vc4-Correct-DSI-divider-calculations.patch bcm27xx: 950-0664-drm-vc4-dsi-Correct-max-divider-to-255-not-7.patch bcm53xx: 072-next-ARM_dts_BCM53015-add-mr26.patch mediatek: 920-linux-next-dts-mt7622-bpi-r64-fix-wps-button.patch Manually rebased following patches: bcm27xx: 950-0004-drm-vc4-hdmi-Remove-the-DDC-probing-for-status-detec.patch bcm27xx: 950-0700-net-phy-lan87xx-Decrease-phy-polling-rate.patch bcm27xx: 950-0711-drm-vc4-Rename-bridge-to-out_bridge.patch bcm27xx: 950-0713-drm-vc4-Remove-splitting-the-bridge-chain-from-the-d.patch bcm27xx: 950-0715-drm-vc4-Convert-vc4_dsi-to-using-a-bridge-instead-of.patch bcm27xx: 950-0787-vc4-drm-vc4_plane-Keep-fractional-source-coords-insi.patch bcm27xx: 950-0914-mmc-block-Don-t-do-single-sector-reads-during-recove.patch Runtime tested on turris-omnia and glinet-b1300. Tested-by: John Audia <therealgraysky@proton.me> [bcm2711/RPi4B, mt7622/RT3200] Signed-off-by: Petr Štetiar <ynezz@true.cz>
122 lines
3.7 KiB
Diff
122 lines
3.7 KiB
Diff
From: Christian Lamparter <chunkeey@googlemail.com>
|
|
Subject: SoC: add qualcomm syscon
|
|
--- a/drivers/soc/qcom/Makefile
|
|
+++ b/drivers/soc/qcom/Makefile
|
|
@@ -21,6 +21,7 @@ obj-$(CONFIG_QCOM_SMP2P) += smp2p.o
|
|
obj-$(CONFIG_QCOM_SMSM) += smsm.o
|
|
obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o
|
|
obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
|
|
+obj-$(CONFIG_QCOM_TCSR) += qcom_tcsr.o
|
|
obj-$(CONFIG_QCOM_APR) += apr.o
|
|
obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
|
|
obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
|
|
--- a/drivers/soc/qcom/Kconfig
|
|
+++ b/drivers/soc/qcom/Kconfig
|
|
@@ -191,6 +191,13 @@ config QCOM_SOCINFO
|
|
Say yes here to support the Qualcomm socinfo driver, providing
|
|
information about the SoC to user space.
|
|
|
|
+config QCOM_TCSR
|
|
+ tristate "QCOM Top Control and Status Registers"
|
|
+ depends on ARCH_QCOM
|
|
+ help
|
|
+ Say y here to enable TCSR support. The TCSR provides control
|
|
+ functions for various peripherals.
|
|
+
|
|
config QCOM_WCNSS_CTRL
|
|
tristate "Qualcomm WCNSS control driver"
|
|
depends on ARCH_QCOM || COMPILE_TEST
|
|
--- /dev/null
|
|
+++ b/drivers/soc/qcom/qcom_tcsr.c
|
|
@@ -0,0 +1,64 @@
|
|
+/*
|
|
+ * Copyright (c) 2014, The Linux foundation. All rights reserved.
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or modify
|
|
+ * it under the terms of the GNU General Public License rev 2 and
|
|
+ * only rev 2 as published by the free Software foundation.
|
|
+ *
|
|
+ * This program is distributed in the hope that it will be useful,
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE. See the
|
|
+ * GNU General Public License for more details.
|
|
+ */
|
|
+
|
|
+#include <linux/clk.h>
|
|
+#include <linux/err.h>
|
|
+#include <linux/io.h>
|
|
+#include <linux/module.h>
|
|
+#include <linux/of.h>
|
|
+#include <linux/of_platform.h>
|
|
+#include <linux/platform_device.h>
|
|
+
|
|
+#define TCSR_USB_PORT_SEL 0xb0
|
|
+
|
|
+static int tcsr_probe(struct platform_device *pdev)
|
|
+{
|
|
+ struct resource *res;
|
|
+ const struct device_node *node = pdev->dev.of_node;
|
|
+ void __iomem *base;
|
|
+ u32 val;
|
|
+
|
|
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
+ base = devm_ioremap_resource(&pdev->dev, res);
|
|
+ if (IS_ERR(base))
|
|
+ return PTR_ERR(base);
|
|
+
|
|
+ if (!of_property_read_u32(node, "qcom,usb-ctrl-select", &val)) {
|
|
+ dev_err(&pdev->dev, "setting usb port select = %d\n", val);
|
|
+ writel(val, base + TCSR_USB_PORT_SEL);
|
|
+ }
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct of_device_id tcsr_dt_match[] = {
|
|
+ { .compatible = "qcom,tcsr", },
|
|
+ { },
|
|
+};
|
|
+
|
|
+MODULE_DEVICE_TABLE(of, tcsr_dt_match);
|
|
+
|
|
+static struct platform_driver tcsr_driver = {
|
|
+ .driver = {
|
|
+ .name = "tcsr",
|
|
+ .owner = THIS_MODULE,
|
|
+ .of_match_table = tcsr_dt_match,
|
|
+ },
|
|
+ .probe = tcsr_probe,
|
|
+};
|
|
+
|
|
+module_platform_driver(tcsr_driver);
|
|
+
|
|
+MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
|
|
+MODULE_DESCRIPTION("QCOM TCSR driver");
|
|
+MODULE_LICENSE("GPL v2");
|
|
--- /dev/null
|
|
+++ b/include/dt-bindings/soc/qcom,tcsr.h
|
|
@@ -0,0 +1,23 @@
|
|
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
|
|
+ *
|
|
+ * This program is free software; you can redistribute it and/or modify
|
|
+ * it under the terms of the GNU General Public License version 2 and
|
|
+ * only version 2 as published by the Free Software Foundation.
|
|
+ *
|
|
+ * This program is distributed in the hope that it will be useful,
|
|
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+ * GNU General Public License for more details.
|
|
+ */
|
|
+#ifndef __DT_BINDINGS_QCOM_TCSR_H
|
|
+#define __DT_BINDINGS_QCOM_TCSR_H
|
|
+
|
|
+#define TCSR_USB_SELECT_USB3_P0 0x1
|
|
+#define TCSR_USB_SELECT_USB3_P1 0x2
|
|
+#define TCSR_USB_SELECT_USB3_DUAL 0x3
|
|
+
|
|
+/* TCSR A/B REG */
|
|
+#define IPQ806X_TCSR_REG_A_ADM_CRCI_MUX_SEL 0
|
|
+#define IPQ806X_TCSR_REG_B_ADM_CRCI_MUX_SEL 1
|
|
+
|
|
+#endif
|