mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 15:02:32 +00:00
8d69af7c9f
SVN-Revision: 33936
97 lines
2.7 KiB
Diff
97 lines
2.7 KiB
Diff
--- a/arch/mips/bcm63xx/irq.c
|
|
+++ b/arch/mips/bcm63xx/irq.c
|
|
@@ -56,8 +56,8 @@ static void __internal_irq_unmask_64(uns
|
|
#define is_ext_irq_cascaded 0
|
|
#define ext_irq_start 0
|
|
#define ext_irq_end 0
|
|
-#define ext_irq_count 0
|
|
-#define ext_irq_cfg_reg1 0
|
|
+#define ext_irq_count 4
|
|
+#define ext_irq_cfg_reg1 PERF_EXTIRQ_CFG_REG_6345
|
|
#define ext_irq_cfg_reg2 0
|
|
#endif
|
|
#ifdef CONFIG_BCM63XX_CPU_6348
|
|
@@ -143,11 +143,15 @@ static void bcm63xx_init_irq(void)
|
|
irq_stat_addr += PERF_IRQSTAT_6338_REG;
|
|
irq_mask_addr += PERF_IRQMASK_6338_REG;
|
|
irq_bits = 32;
|
|
+ ext_irq_count = 4;
|
|
+ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
|
|
break;
|
|
case BCM6345_CPU_ID:
|
|
irq_stat_addr += PERF_IRQSTAT_6345_REG;
|
|
irq_mask_addr += PERF_IRQMASK_6345_REG;
|
|
irq_bits = 32;
|
|
+ ext_irq_count = 4;
|
|
+ ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
|
|
break;
|
|
case BCM6348_CPU_ID:
|
|
irq_stat_addr += PERF_IRQSTAT_6348_REG;
|
|
@@ -434,7 +438,8 @@ static int bcm63xx_external_irq_set_type
|
|
reg = bcm_perf_readl(regaddr);
|
|
irq %= 4;
|
|
|
|
- if (BCMCPU_IS_6348()) {
|
|
+ switch (bcm63xx_get_cpu_id()) {
|
|
+ case BCM6348_CPU_ID:
|
|
if (levelsense)
|
|
reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
|
|
else
|
|
@@ -447,9 +452,12 @@ static int bcm63xx_external_irq_set_type
|
|
reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
|
|
else
|
|
reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
|
|
- }
|
|
+ break;
|
|
|
|
- if (BCMCPU_IS_6338() || BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
|
|
+ case BCM6338_CPU_ID:
|
|
+ case BCM6345_CPU_ID:
|
|
+ case BCM6358_CPU_ID:
|
|
+ case BCM6368_CPU_ID:
|
|
if (levelsense)
|
|
reg |= EXTIRQ_CFG_LEVELSENSE(irq);
|
|
else
|
|
@@ -462,6 +470,9 @@ static int bcm63xx_external_irq_set_type
|
|
reg |= EXTIRQ_CFG_BOTHEDGE(irq);
|
|
else
|
|
reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
|
|
+ break;
|
|
+ default:
|
|
+ BUG();
|
|
}
|
|
|
|
bcm_perf_writel(reg, regaddr);
|
|
--- a/arch/mips/bcm63xx/setup.c
|
|
+++ b/arch/mips/bcm63xx/setup.c
|
|
@@ -74,6 +74,9 @@ void bcm63xx_machine_reboot(void)
|
|
case BCM6338_CPU_ID:
|
|
perf_regs[0] = PERF_EXTIRQ_CFG_REG_6338;
|
|
break;
|
|
+ case BCM6345_CPU_ID:
|
|
+ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6345;
|
|
+ break;
|
|
case BCM6348_CPU_ID:
|
|
perf_regs[0] = PERF_EXTIRQ_CFG_REG_6348;
|
|
break;
|
|
@@ -83,6 +86,9 @@ void bcm63xx_machine_reboot(void)
|
|
}
|
|
|
|
for (i = 0; i < 2; i++) {
|
|
+ if (!perf_regs[i])
|
|
+ break;
|
|
+
|
|
reg = bcm_perf_readl(perf_regs[i]);
|
|
if (BCMCPU_IS_6348()) {
|
|
reg &= ~EXTIRQ_CFG_MASK_ALL_6348;
|
|
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
|
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
|
|
@@ -161,6 +161,7 @@
|
|
/* External Interrupt Configuration register */
|
|
#define PERF_EXTIRQ_CFG_REG_6328 0x18
|
|
#define PERF_EXTIRQ_CFG_REG_6338 0x14
|
|
+#define PERF_EXTIRQ_CFG_REG_6345 0x14
|
|
#define PERF_EXTIRQ_CFG_REG_6348 0x14
|
|
#define PERF_EXTIRQ_CFG_REG_6358 0x14
|
|
#define PERF_EXTIRQ_CFG_REG_6368 0x18
|