mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 14:13:16 +00:00
c33eb0372e
ipTIME A3004NS-dual is a 2.4/5GHz band router, based on Mediatek MT7621. Specifications: - SoC: MT7621 (880MHz) - RAM: DDR3 256M - Flash: SPI NOR 16MB - WiFi: - 2.4GHz: MT7602E - 5GHz : MT7612E - Ethernet: - 4x LAN - 1x WAN - USB: 1 * USB3.0 port - UART: - 3.3V, TX, RX, GND / 57600 8N1 Installation via web interface: - 1. Flash Initramfs image using OEM Firmware's web GUI - 2. Boot into OpenWrt and perform Sysupgrade with sysupgrade image. Revert to stock firmware: - 1. Boot into OpenWrt and perform Sysupgrade with OEM Stock Firmware image. Signed-off-by: Yuchan Seo <hexagonwin@disroot.org> Reviewed-by: Sungbo Eo <mans0n@gorani.run>
180 lines
2.7 KiB
Plaintext
180 lines
2.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
|
|
#include "mt7621.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "iptime,a3004ns-dual", "mediatek,mt7621-soc";
|
|
model = "ipTIME A3004NS-dual";
|
|
|
|
aliases {
|
|
led-boot = &led_cpu;
|
|
led-failsafe = &led_cpu;
|
|
led-running = &led_cpu;
|
|
led-upgrade = &led_cpu;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_cpu: cpu {
|
|
label = "blue:cpu";
|
|
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
usb {
|
|
label = "blue:usb";
|
|
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
|
|
trigger-sources = <&xhci_ehci_port1>;
|
|
linux,default-trigger = "usbport";
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
|
|
wps {
|
|
label = "wps";
|
|
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <50000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
uboot: partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0 0x20000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@20000 {
|
|
label = "config";
|
|
reg = <0x20000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@30000 {
|
|
label = "factory";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@40000 {
|
|
label = "firmware";
|
|
reg = <0x40000 0xfc0000>;
|
|
compatible = "denx,uimage";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&gmac0 {
|
|
nvmem-cells = <&macaddr_uboot_1fc20>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
&switch0 {
|
|
ports {
|
|
port@0 {
|
|
status = "okay";
|
|
label = "wan";
|
|
nvmem-cells = <&macaddr_uboot_1fc40>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
port@1 {
|
|
status = "okay";
|
|
label = "lan1";
|
|
};
|
|
|
|
port@2 {
|
|
status = "okay";
|
|
label = "lan2";
|
|
};
|
|
|
|
port@3 {
|
|
status = "okay";
|
|
label = "lan3";
|
|
};
|
|
|
|
port@4 {
|
|
status = "okay";
|
|
label = "lan4";
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
wifi@0,0 {
|
|
compatible = "mediatek,mt76";
|
|
reg = <0x0000 0 0 0 0>;
|
|
mediatek,mtd-eeprom = <&factory 0x8000>;
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
|
|
led {
|
|
led-sources = <2>;
|
|
led-active-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie1 {
|
|
wifi@0,0 {
|
|
compatible = "mediatek,mt76";
|
|
reg = <0x0000 0 0 0 0>;
|
|
mediatek,mtd-eeprom = <&factory 0x0000>;
|
|
ieee80211-freq-limit = <2400000 2500000>;
|
|
|
|
led {
|
|
led-sources = <2>;
|
|
led-active-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
&state_default {
|
|
gpio {
|
|
groups = "wdt", "i2c", "uart3";
|
|
function = "gpio";
|
|
};
|
|
};
|
|
|
|
&uboot {
|
|
compatible = "nvmem-cells";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
macaddr_uboot_1fc20: macaddr@1fc20 {
|
|
reg = <0x1fc20 0x6>;
|
|
};
|
|
|
|
macaddr_uboot_1fc40: macaddr@1fc40 {
|
|
reg = <0x1fc40 0x6>;
|
|
};
|
|
};
|