mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 06:57:57 +00:00
87 lines
4.0 KiB
Diff
87 lines
4.0 KiB
Diff
--- a/drivers/net/wireless/brcm80211/brcmsmac/dma.c
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+++ b/drivers/net/wireless/brcm80211/brcmsmac/dma.c
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@@ -640,10 +640,10 @@ struct dma_pub *dma_attach(char *name, s
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di->dataoffsetlow = di->ddoffsetlow;
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di->dataoffsethigh = di->ddoffsethigh;
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/* WAR64450 : DMACtl.Addr ext fields are not supported in SDIOD core. */
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- if ((core->id.id == SDIOD_CORE_ID)
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+ if ((core->id.id == BCMA_CORE_SDIO_DEV)
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&& ((rev > 0) && (rev <= 2)))
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di->addrext = false;
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- else if ((core->id.id == I2S_CORE_ID) &&
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+ else if ((core->id.id == BCMA_CORE_I2S) &&
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((rev == 0) || (rev == 1)))
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di->addrext = false;
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else
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--- a/drivers/net/wireless/brcm80211/include/soc.h
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+++ b/drivers/net/wireless/brcm80211/include/soc.h
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@@ -19,68 +19,6 @@
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#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */
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-/* core codes */
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-#define NODEV_CORE_ID 0x700 /* Invalid coreid */
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-#define CC_CORE_ID 0x800 /* chipcommon core */
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-#define ILINE20_CORE_ID 0x801 /* iline20 core */
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-#define SRAM_CORE_ID 0x802 /* sram core */
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-#define SDRAM_CORE_ID 0x803 /* sdram core */
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-#define PCI_CORE_ID 0x804 /* pci core */
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-#define MIPS_CORE_ID 0x805 /* mips core */
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-#define ENET_CORE_ID 0x806 /* enet mac core */
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-#define CODEC_CORE_ID 0x807 /* v90 codec core */
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-#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */
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-#define ADSL_CORE_ID 0x809 /* ADSL core */
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-#define ILINE100_CORE_ID 0x80a /* iline100 core */
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-#define IPSEC_CORE_ID 0x80b /* ipsec core */
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-#define UTOPIA_CORE_ID 0x80c /* utopia core */
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-#define PCMCIA_CORE_ID 0x80d /* pcmcia core */
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-#define SOCRAM_CORE_ID 0x80e /* internal memory core */
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-#define MEMC_CORE_ID 0x80f /* memc sdram core */
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-#define OFDM_CORE_ID 0x810 /* OFDM phy core */
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-#define EXTIF_CORE_ID 0x811 /* external interface core */
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-#define D11_CORE_ID 0x812 /* 802.11 MAC core */
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-#define APHY_CORE_ID 0x813 /* 802.11a phy core */
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-#define BPHY_CORE_ID 0x814 /* 802.11b phy core */
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-#define GPHY_CORE_ID 0x815 /* 802.11g phy core */
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-#define MIPS33_CORE_ID 0x816 /* mips3302 core */
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-#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */
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-#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */
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-#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */
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-#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */
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-#define SDIOH_CORE_ID 0x81b /* sdio host core */
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-#define ROBO_CORE_ID 0x81c /* roboswitch core */
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-#define ATA100_CORE_ID 0x81d /* parallel ATA core */
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-#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */
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-#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */
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-#define PCIE_CORE_ID 0x820 /* pci express core */
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-#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */
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-#define SRAMC_CORE_ID 0x822 /* SRAM controller core */
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-#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */
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-#define ARM11_CORE_ID 0x824 /* ARM 1176 core */
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-#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */
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-#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */
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-#define PMU_CORE_ID 0x827 /* PMU core */
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-#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */
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-#define SDIOD_CORE_ID 0x829 /* SDIO device core */
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-#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */
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-#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */
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-#define MIPS74K_CORE_ID 0x82c /* mips 74k core */
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-#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */
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-#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */
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-#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */
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-#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */
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-#define SC_CORE_ID 0x831 /* shared common core */
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-#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */
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-#define SPIH_CORE_ID 0x833 /* SPI host core */
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-#define I2S_CORE_ID 0x834 /* I2S core */
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-#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */
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-#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */
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-#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */
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-#define DEF_AI_COMP 0xfff /* Default component, in ai chips it
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- * maps all unused address ranges
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- */
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-
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/* Common core control flags */
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#define SICF_BIST_EN 0x8000
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#define SICF_PME_EN 0x4000
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