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56 lines
1.8 KiB
Diff
56 lines
1.8 KiB
Diff
From 41fa6dec9df9b4e55ac522c899270a72e51a9b4b Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Sat, 9 Jul 2011 12:15:06 -0700
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Subject: [PATCH V2 2/2] MIPS: BCM63XX: Enable second core SMP on BCM6328 if
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available
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BCM6328 has a OTP which tells us if the second core is available.
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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arch/mips/bcm63xx/prom.c | 6 +++++-
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 ++
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 7 +++++++
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3 files changed, 14 insertions(+), 1 deletion(-)
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--- a/arch/mips/bcm63xx/prom.c
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+++ b/arch/mips/bcm63xx/prom.c
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@@ -69,7 +69,11 @@ void __init prom_init(void)
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* for now.
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*/
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if (BCMCPU_IS_6328()) {
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- bmips_smp_enabled = 0;
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+ reg = bcm_readl(BCM_6328_OTP_BASE +
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+ OTP_USER_BITS_6328_REG(3));
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+
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+ if (reg & OTP_6328_REG3_TP1_DISABLED)
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+ bmips_smp_enabled = 0;
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} else if (BCMCPU_IS_6358()) {
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bmips_smp_enabled = 0;
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}
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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@@ -296,6 +296,8 @@ enum bcm63xx_regs_set {
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#define BCM_6328_PCMDMAS_BASE (0xdeadbeef)
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#define BCM_6328_RNG_BASE (0xdeadbeef)
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#define BCM_6328_MISC_BASE (0xb0001800)
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+#define BCM_6328_OTP_BASE (0xb0000600)
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+
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/*
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* 6338 register sets base address
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*/
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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@@ -1477,4 +1477,11 @@
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#define PCIE_DEVICE_OFFSET 0x8000
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+/*************************************************************************
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+ * _REG relative to RSET_OTP
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+ *************************************************************************/
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+
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+#define OTP_USER_BITS_6328_REG(i) (0x20 + (i) * 4)
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+#define OTP_6328_REG3_TP1_DISABLED BIT(9)
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+
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#endif /* BCM63XX_REGS_H_ */
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