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362 lines
9.7 KiB
Diff
362 lines
9.7 KiB
Diff
From b8d7478ecfec51b3430f677da44e662d5ff12444 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Fri, 12 Aug 2016 00:28:03 +0200
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Subject: [PATCH] phy: bcm-ns-usb3: new driver for USB 3.0 PHY on Northstar
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Northstar is a family of SoCs used in home routers. They have USB 2.0
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and 3.0 controllers with PHYs that need to be properly initialized.
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This driver provides PHY init support in a generic way and can be bound
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with XHCI controller driver.
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There aren't any public datasheets from Broadcom so we can't have nice
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defines for all used bits. It means we just follow Broadcom's
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initialization procedure using their magic values. We were quite lucky
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actually that Broadcom put some comments in their SDK reference code
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explaining what given writes are responsible for.
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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---
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.../devicetree/bindings/phy/bcm-ns-usb3-phy.txt | 23 ++
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drivers/phy/Kconfig | 9 +
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drivers/phy/Makefile | 1 +
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drivers/phy/phy-bcm-ns-usb3.c | 274 +++++++++++++++++++++
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4 files changed, 307 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/phy/bcm-ns-usb3-phy.txt
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create mode 100644 drivers/phy/phy-bcm-ns-usb3.c
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/phy/bcm-ns-usb3-phy.txt
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@@ -0,0 +1,23 @@
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+Driver for Broadcom Northstar USB 3.0 PHY
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+
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+Required properties:
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+
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+- compatible: one of: "brcm,ns-ax-usb3-phy", "brcm,ns-bx-usb3-phy".
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+- reg: register mappings for DMP (Device Management Plugin) and ChipCommon B
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+ MMI.
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+- reg-names: "dmp" and "ccb-mii"
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+
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+Initialization of USB 3.0 PHY depends on Northstar version. There are currently
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+three known series: Ax, Bx and Cx.
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+Known A0: BCM4707 rev 0
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+Known B0: BCM4707 rev 4, BCM53573 rev 2
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+Known B1: BCM4707 rev 6
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+Known C0: BCM47094 rev 0
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+
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+Example:
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+ usb3-phy {
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+ compatible = "brcm,ns-ax-usb3-phy";
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+ reg = <0x18105000 0x1000>, <0x18003000 0x1000>;
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+ reg-names = "dmp", "ccb-mii";
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+ #phy-cells = <0>;
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+ };
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--- a/drivers/phy/Kconfig
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+++ b/drivers/phy/Kconfig
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@@ -24,6 +24,15 @@ config PHY_BCM_NS_USB2
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Enable this to support Broadcom USB 2.0 PHY connected to the USB
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controller on Northstar family.
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+config PHY_BCM_NS_USB3
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+ tristate "Broadcom Northstar USB 3.0 PHY Driver"
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+ depends on ARCH_BCM_IPROC || COMPILE_TEST
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+ depends on HAS_IOMEM && OF
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+ select GENERIC_PHY
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+ help
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+ Enable this to support Broadcom USB 3.0 PHY connected to the USB
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+ controller on Northstar family.
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+
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config PHY_BERLIN_USB
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tristate "Marvell Berlin USB PHY Driver"
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depends on ARCH_BERLIN && RESET_CONTROLLER && HAS_IOMEM && OF
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--- a/drivers/phy/Makefile
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+++ b/drivers/phy/Makefile
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@@ -4,6 +4,7 @@
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obj-$(CONFIG_GENERIC_PHY) += phy-core.o
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obj-$(CONFIG_PHY_BCM_NS_USB2) += phy-bcm-ns-usb2.o
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+obj-$(CONFIG_PHY_BCM_NS_USB3) += phy-bcm-ns-usb3.o
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obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o
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obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
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obj-$(CONFIG_PHY_DM816X_USB) += phy-dm816x-usb.o
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--- /dev/null
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+++ b/drivers/phy/phy-bcm-ns-usb3.c
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@@ -0,0 +1,274 @@
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+/*
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+ * Broadcom Northstar USB 3.0 PHY Driver
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+ *
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+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
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+ *
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+ * All magic values used for initialization (and related comments) were obtained
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+ * from Broadcom's SDK:
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+ * Copyright (c) Broadcom Corp, 2012
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <linux/bcma/bcma.h>
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+#include <linux/delay.h>
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+#include <linux/err.h>
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+#include <linux/module.h>
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+#include <linux/of_platform.h>
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+#include <linux/platform_device.h>
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+#include <linux/phy/phy.h>
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+#include <linux/slab.h>
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+
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+#define BCM_NS_USB3_MII_MNG_TIMEOUT_US 1000 /* usecs */
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+
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+enum bcm_ns_family {
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+ BCM_NS_UNKNOWN,
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+ BCM_NS_AX,
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+ BCM_NS_BX,
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+};
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+
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+struct bcm_ns_usb3 {
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+ struct device *dev;
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+ enum bcm_ns_family family;
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+ void __iomem *dmp;
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+ void __iomem *ccb_mii;
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+ struct phy *phy;
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+};
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+
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+static const struct of_device_id bcm_ns_usb3_id_table[] = {
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+ {
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+ .compatible = "brcm,ns-ax-usb3-phy",
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+ .data = (int *)BCM_NS_AX,
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+ },
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+ {
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+ .compatible = "brcm,ns-bx-usb3-phy",
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+ .data = (int *)BCM_NS_BX,
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+ },
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+ {},
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+};
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+MODULE_DEVICE_TABLE(of, bcm_ns_usb3_id_table);
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+
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+static int bcm_ns_usb3_wait_reg(struct bcm_ns_usb3 *usb3, void __iomem *addr,
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+ u32 mask, u32 value, unsigned long timeout)
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+{
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+ unsigned long deadline = jiffies + timeout;
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+ u32 val;
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+
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+ do {
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+ val = readl(addr);
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+ if ((val & mask) == value)
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+ return 0;
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+ cpu_relax();
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+ udelay(10);
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+ } while (!time_after_eq(jiffies, deadline));
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+
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+ dev_err(usb3->dev, "Timeout waiting for register %p\n", addr);
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+
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+ return -EBUSY;
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+}
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+
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+static inline int bcm_ns_usb3_mii_mng_wait_idle(struct bcm_ns_usb3 *usb3)
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+{
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+ return bcm_ns_usb3_wait_reg(usb3, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL,
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+ 0x0100, 0x0000,
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+ usecs_to_jiffies(BCM_NS_USB3_MII_MNG_TIMEOUT_US));
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+}
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+
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+static int bcm_ns_usb3_mii_mng_write32(struct bcm_ns_usb3 *usb3, u32 value)
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+{
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+ int err;
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+
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+ err = bcm_ns_usb3_mii_mng_wait_idle(usb3);
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+ if (err < 0) {
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+ dev_err(usb3->dev, "Couldn't write 0x%08x value\n", value);
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+ return err;
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+ }
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+
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+ writel(value, usb3->ccb_mii + BCMA_CCB_MII_MNG_CMD_DATA);
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+
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+ return 0;
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+}
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+
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+static int bcm_ns_usb3_phy_init_ns_bx(struct bcm_ns_usb3 *usb3)
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+{
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+ int err;
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+
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+ /* Enable MDIO. Setting MDCDIV as 26 */
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+ writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL);
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+
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+ /* Wait for MDIO? */
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+ udelay(2);
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+
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+ /* USB3 PLL Block */
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+ err = bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8000);
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+ if (err < 0)
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+ return err;
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+
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+ /* Assert Ana_Pllseq start */
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x58061000);
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+
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+ /* Assert CML Divider ratio to 26 */
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x582a6400);
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+
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+ /* Asserting PLL Reset */
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x582ec000);
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+
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+ /* Deaaserting PLL Reset */
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x582e8000);
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+
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+ /* Waiting MII Mgt interface idle */
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+ bcm_ns_usb3_mii_mng_wait_idle(usb3);
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+
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+ /* Deasserting USB3 system reset */
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+ writel(0, usb3->dmp + BCMA_RESET_CTL);
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+
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+ /* PLL frequency monitor enable */
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x58069000);
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+
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+ /* PIPE Block */
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8060);
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+
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+ /* CMPMAX & CMPMINTH setting */
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x580af30d);
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+
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+ /* DEGLITCH MIN & MAX setting */
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x580e6302);
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+
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+ /* TXPMD block */
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8040);
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+
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+ /* Enabling SSC */
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x58061003);
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+
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+ /* Waiting MII Mgt interface idle */
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+ bcm_ns_usb3_mii_mng_wait_idle(usb3);
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+
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+ return 0;
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+}
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+
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+static int bcm_ns_usb3_phy_init_ns_ax(struct bcm_ns_usb3 *usb3)
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+{
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+ int err;
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+
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+ /* Enable MDIO. Setting MDCDIV as 26 */
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+ writel(0x0000009a, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL);
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+
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+ /* Wait for MDIO? */
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+ udelay(2);
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+
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+ /* PLL30 block */
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+ err = bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8000);
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+ if (err < 0)
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+ return err;
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+
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x582a6400);
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+
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x587e80e0);
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+
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x580a009c);
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+
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+ /* Enable SSC */
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x587e8040);
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+
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x580a21d3);
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+
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+ bcm_ns_usb3_mii_mng_write32(usb3, 0x58061003);
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+
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+ /* Waiting MII Mgt interface idle */
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+ bcm_ns_usb3_mii_mng_wait_idle(usb3);
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+
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+ /* Deasserting USB3 system reset */
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+ writel(0, usb3->dmp + BCMA_RESET_CTL);
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+
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+ return 0;
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+}
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+
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+static int bcm_ns_usb3_phy_init(struct phy *phy)
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+{
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+ struct bcm_ns_usb3 *usb3 = phy_get_drvdata(phy);
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+ int err;
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+
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+ /* Perform USB3 system soft reset */
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+ writel(BCMA_RESET_CTL_RESET, usb3->dmp + BCMA_RESET_CTL);
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+
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+ switch (usb3->family) {
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+ case BCM_NS_AX:
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+ err = bcm_ns_usb3_phy_init_ns_ax(usb3);
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+ break;
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+ case BCM_NS_BX:
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+ err = bcm_ns_usb3_phy_init_ns_bx(usb3);
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+ break;
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+ default:
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+ WARN_ON(1);
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+ err = -ENOTSUPP;
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+ }
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+
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+ return err;
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+}
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+
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+static const struct phy_ops ops = {
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+ .init = bcm_ns_usb3_phy_init,
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+ .owner = THIS_MODULE,
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+};
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+
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+static int bcm_ns_usb3_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ const struct of_device_id *of_id;
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+ struct bcm_ns_usb3 *usb3;
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+ struct resource *res;
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+ struct phy_provider *phy_provider;
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+
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+ usb3 = devm_kzalloc(dev, sizeof(*usb3), GFP_KERNEL);
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+ if (!usb3)
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+ return -ENOMEM;
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+
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+ usb3->dev = dev;
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+
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+ of_id = of_match_device(bcm_ns_usb3_id_table, dev);
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+ if (!of_id)
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+ return -EINVAL;
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+ usb3->family = (enum bcm_ns_family)of_id->data;
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+
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+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmp");
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+ usb3->dmp = devm_ioremap_resource(dev, res);
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+ if (IS_ERR(usb3->dmp)) {
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+ dev_err(dev, "Failed to map DMP regs\n");
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+ return PTR_ERR(usb3->dmp);
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+ }
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+
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+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ccb-mii");
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+ usb3->ccb_mii = devm_ioremap_resource(dev, res);
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+ if (IS_ERR(usb3->ccb_mii)) {
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+ dev_err(dev, "Failed to map ChipCommon B MII regs\n");
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+ return PTR_ERR(usb3->ccb_mii);
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+ }
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+
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+ usb3->phy = devm_phy_create(dev, NULL, &ops);
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+ if (IS_ERR(usb3->phy)) {
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+ dev_err(dev, "Failed to create PHY\n");
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+ return PTR_ERR(usb3->phy);
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+ }
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+
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+ phy_set_drvdata(usb3->phy, usb3);
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+ platform_set_drvdata(pdev, usb3);
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+
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+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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+ if (!IS_ERR(phy_provider))
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+ dev_info(dev, "Registered Broadcom Northstar USB 3.0 PHY driver\n");
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+
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+ return PTR_ERR_OR_ZERO(phy_provider);
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+}
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+
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+static struct platform_driver bcm_ns_usb3_driver = {
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+ .probe = bcm_ns_usb3_probe,
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+ .driver = {
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+ .name = "bcm_ns_usb3",
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+ .of_match_table = bcm_ns_usb3_id_table,
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+ },
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+};
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+module_platform_driver(bcm_ns_usb3_driver);
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+
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+MODULE_LICENSE("GPL v2");
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