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25afe99b31
the support is still WIP. next steps are to make the pmic and ethernet work. this is the first commit to make sure nothing gets lost. Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 47354
52 lines
1.6 KiB
Diff
52 lines
1.6 KiB
Diff
From 3b3c2406dd9797bc806e0ce756142a33d209c4e8 Mon Sep 17 00:00:00 2001
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From: "Joe.C" <yingjoe.chen@mediatek.com>
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Date: Fri, 1 May 2015 15:43:25 +0800
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Subject: [PATCH 40/76] clocksource: mediatek: Use GPT as sched clock source
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When cpu is in deep idle, arch timer will stop counting. Setup GPT as
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sched clock source so it can keep counting in idle.
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Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
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---
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drivers/clocksource/mtk_timer.c | 10 ++++++++++
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1 file changed, 10 insertions(+)
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diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
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index 85e0ab5..9a90c7b 100644
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--- a/drivers/clocksource/mtk_timer.c
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+++ b/drivers/clocksource/mtk_timer.c
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@@ -24,6 +24,7 @@
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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+#include <linux/sched_clock.h>
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#include <linux/slab.h>
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#define GPT_IRQ_EN_REG 0x00
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@@ -59,6 +60,13 @@ struct mtk_clock_event_device {
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struct clock_event_device dev;
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};
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+static void __iomem *gpt_base __read_mostly;
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+
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+static u64 notrace mtk_read_sched_clock(void)
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+{
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+ return readl_relaxed(gpt_base + TIMER_CNT_REG(GPT_CLK_SRC));
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+}
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+
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static inline struct mtk_clock_event_device *to_mtk_clk(
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struct clock_event_device *c)
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{
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@@ -239,6 +247,8 @@ static void __init mtk_timer_init(struct device_node *node)
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mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN);
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clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC),
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node->name, rate, 300, 32, clocksource_mmio_readl_up);
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+ gpt_base = evt->gpt_base;
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+ sched_clock_register(mtk_read_sched_clock, 32, rate);
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/* Configure clock event */
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mtk_timer_setup(evt, GPT_CLK_EVT, TIMER_CTRL_OP_REPEAT);
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--
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1.7.10.4
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