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https://github.com/openwrt/openwrt.git
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4070e2a64c
This target adds support for the StarFive JH7100 and JH7110 SoCs, based on 6.1, as well as a couple boards equipped with these. Specifications: SoCs: JH7100: - StarFive JH7100 dual-core RISC-V (U74, RC64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache JH7110: - StarFive JH7110 quad-core RISC-V (U74, RV64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache Boards: VisionFive1: - JH7100 @ 1GHz - Memory: 8Gb LPDDR4 - 4x USB3.0 - 1x GBit ethernet - AMPak 6236 wifi / bluetooth - audio - powered via USB-C VisionFive2: - JH7110 @ 1.5GHz - Memory: 2/4/8Gb DDR4 - 2x Gbit ethernet - 2x USB3.0 / 2x USB2.0 - eMMC / SDIO - various multimedia input/outputs (MIPI CSI, HDMI, audio) - M.2 key M slot - PoE support - powered via USB-C Installation: Standard SD-card installation via dd-ing the generated image to an SD-card of at least 256Mb. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
631 lines
16 KiB
Diff
631 lines
16 KiB
Diff
From 0dc93c9321ba947ac429baeb58202496e4b0f219 Mon Sep 17 00:00:00 2001
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From: Jack Zhu <jack.zhu@starfivetech.com>
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Date: Fri, 12 May 2023 18:28:41 +0800
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Subject: [PATCH 083/122] media: starfive: Add basic driver
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Add basic platform driver for StarFive Camera Subsystem.
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Signed-off-by: Jack Zhu <jack.zhu@starfivetech.com>
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Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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---
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drivers/media/platform/Kconfig | 1 +
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drivers/media/platform/Makefile | 1 +
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drivers/media/platform/starfive/Kconfig | 19 +
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drivers/media/platform/starfive/Makefile | 9 +
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drivers/media/platform/starfive/stf_camss.c | 372 +++++++++++++++++++
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drivers/media/platform/starfive/stf_camss.h | 153 ++++++++
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drivers/media/platform/starfive/stf_common.h | 18 +
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7 files changed, 573 insertions(+)
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create mode 100644 drivers/media/platform/starfive/Kconfig
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create mode 100644 drivers/media/platform/starfive/Makefile
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create mode 100644 drivers/media/platform/starfive/stf_camss.c
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create mode 100644 drivers/media/platform/starfive/stf_camss.h
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create mode 100644 drivers/media/platform/starfive/stf_common.h
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--- a/drivers/media/platform/Kconfig
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+++ b/drivers/media/platform/Kconfig
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@@ -79,6 +79,7 @@ source "drivers/media/platform/renesas/K
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source "drivers/media/platform/rockchip/Kconfig"
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source "drivers/media/platform/samsung/Kconfig"
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source "drivers/media/platform/st/Kconfig"
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+source "drivers/media/platform/starfive/Kconfig"
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source "drivers/media/platform/sunxi/Kconfig"
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source "drivers/media/platform/ti/Kconfig"
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source "drivers/media/platform/verisilicon/Kconfig"
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--- a/drivers/media/platform/Makefile
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+++ b/drivers/media/platform/Makefile
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@@ -22,6 +22,7 @@ obj-y += renesas/
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obj-y += rockchip/
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obj-y += samsung/
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obj-y += st/
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+obj-y += starfive/
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obj-y += sunxi/
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obj-y += ti/
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obj-y += verisilicon/
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--- /dev/null
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+++ b/drivers/media/platform/starfive/Kconfig
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@@ -0,0 +1,19 @@
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+# SPDX-License-Identifier: GPL-2.0-only
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+
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+comment "Starfive media platform drivers"
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+
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+config VIDEO_STARFIVE_CAMSS
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+ tristate "Starfive Camera Subsystem driver"
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+ depends on V4L_PLATFORM_DRIVERS
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+ depends on VIDEO_DEV && OF
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+ depends on DMA_CMA
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+ select MEDIA_CONTROLLER
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+ select VIDEO_V4L2_SUBDEV_API
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+ select VIDEOBUF2_DMA_CONTIG
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+ select V4L2_FWNODE
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+ help
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+ Enable this to support for the Starfive Camera subsystem
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+ found on Starfive JH7110 SoC.
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+
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+ To compile this driver as a module, choose M here: the
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+ module will be called stf-camss.
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--- /dev/null
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+++ b/drivers/media/platform/starfive/Makefile
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@@ -0,0 +1,9 @@
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+# SPDX-License-Identifier: GPL-2.0
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+#
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+# Makefile for StarFive camera subsystem driver.
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+#
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+
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+starfive-camss-objs += \
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+ stf_camss.o
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+
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+obj-$(CONFIG_VIDEO_STARFIVE_CAMSS) += starfive-camss.o \
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--- /dev/null
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+++ b/drivers/media/platform/starfive/stf_camss.c
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@@ -0,0 +1,372 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * stf_camss.c
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+ *
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+ * Starfive Camera Subsystem driver
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+ *
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+ * Copyright (C) 2021-2023 StarFive Technology Co., Ltd.
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+ */
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/of_graph.h>
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+#include <linux/platform_device.h>
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+#include <linux/pm_runtime.h>
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+#include <linux/videodev2.h>
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+#include <media/media-device.h>
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+#include <media/v4l2-async.h>
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+#include <media/v4l2-fwnode.h>
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+#include <media/v4l2-mc.h>
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+
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+#include "stf_camss.h"
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+
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+static const char * const stfcamss_clocks[] = {
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+ "clk_apb_func",
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+ "clk_wrapper_clk_c",
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+ "clk_dvp_inv",
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+ "clk_axiwr",
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+ "clk_mipi_rx0_pxl",
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+ "clk_ispcore_2x",
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+ "clk_isp_axi",
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+};
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+
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+static const char * const stfcamss_resets[] = {
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+ "rst_wrapper_p",
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+ "rst_wrapper_c",
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+ "rst_axird",
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+ "rst_axiwr",
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+ "rst_isp_top_n",
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+ "rst_isp_top_axi",
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+};
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+
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+static int stfcamss_get_mem_res(struct platform_device *pdev,
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+ struct stfcamss *stfcamss)
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+{
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+ stfcamss->syscon_base =
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+ devm_platform_ioremap_resource_byname(pdev, "syscon");
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+ if (IS_ERR(stfcamss->syscon_base))
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+ return PTR_ERR(stfcamss->syscon_base);
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+
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+ stfcamss->isp_base =
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+ devm_platform_ioremap_resource_byname(pdev, "isp");
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+ if (IS_ERR(stfcamss->isp_base))
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+ return PTR_ERR(stfcamss->isp_base);
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+
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+ return 0;
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+}
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+
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+/*
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+ * stfcamss_of_parse_endpoint_node - Parse port endpoint node
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+ * @dev: Device
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+ * @node: Device node to be parsed
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+ * @csd: Parsed data from port endpoint node
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+ *
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+ * Return 0 on success or a negative error code on failure
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+ */
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+static int stfcamss_of_parse_endpoint_node(struct device *dev,
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+ struct device_node *node,
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+ struct stfcamss_async_subdev *csd)
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+{
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+ struct v4l2_fwnode_endpoint vep = { { 0 } };
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+
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+ v4l2_fwnode_endpoint_parse(of_fwnode_handle(node), &vep);
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+ dev_dbg(dev, "vep.base.port = 0x%x, id = 0x%x\n",
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+ vep.base.port, vep.base.id);
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+
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+ csd->port = vep.base.port;
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+
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+ return 0;
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+}
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+
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+/*
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+ * stfcamss_of_parse_ports - Parse ports node
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+ * @stfcamss: STFCAMSS device
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+ *
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+ * Return number of "port" nodes found in "ports" node
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+ */
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+static int stfcamss_of_parse_ports(struct stfcamss *stfcamss)
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+{
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+ struct device *dev = stfcamss->dev;
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+ struct device_node *node = NULL;
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+ struct device_node *remote = NULL;
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+ int ret, num_subdevs = 0;
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+
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+ for_each_endpoint_of_node(dev->of_node, node) {
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+ struct stfcamss_async_subdev *csd;
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+
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+ if (!of_device_is_available(node))
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+ continue;
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+
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+ remote = of_graph_get_remote_port_parent(node);
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+ if (!remote) {
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+ dev_err(dev, "Cannot get remote parent\n");
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+ ret = -EINVAL;
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+ goto err_cleanup;
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+ }
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+
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+ csd = v4l2_async_nf_add_fwnode(&stfcamss->notifier,
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+ of_fwnode_handle(remote),
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+ struct stfcamss_async_subdev);
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+ of_node_put(remote);
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+ if (IS_ERR(csd)) {
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+ ret = PTR_ERR(csd);
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+ goto err_cleanup;
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+ }
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+
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+ ret = stfcamss_of_parse_endpoint_node(dev, node, csd);
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+ if (ret < 0)
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+ goto err_cleanup;
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+
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+ num_subdevs++;
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+ }
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+
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+ return num_subdevs;
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+
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+err_cleanup:
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+ of_node_put(node);
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+ return ret;
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+}
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+
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+static int stfcamss_subdev_notifier_bound(struct v4l2_async_notifier *async,
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+ struct v4l2_subdev *subdev,
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+ struct v4l2_async_subdev *asd)
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+{
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+ struct stfcamss *stfcamss =
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+ container_of(async, struct stfcamss, notifier);
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+ struct host_data *host_data = &stfcamss->host_data;
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+ struct media_entity *source;
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+ int i, j;
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+
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+ source = &subdev->entity;
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+
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+ for (i = 0; i < source->num_pads; i++) {
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+ if (source->pads[i].flags & MEDIA_PAD_FL_SOURCE)
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+ break;
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+ }
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+
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+ if (i == source->num_pads) {
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+ dev_err(stfcamss->dev, "No source pad in external entity\n");
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+ return -EINVAL;
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+ }
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+
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+ for (j = 0; host_data->host_entity[j] && (j < HOST_ENTITY_MAX); j++) {
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+ struct media_entity *input;
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+ int ret;
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+
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+ input = host_data->host_entity[j];
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+
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+ ret = media_create_pad_link(
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+ source,
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+ i,
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+ input,
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+ STF_PAD_SINK,
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+ source->function == MEDIA_ENT_F_CAM_SENSOR ?
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+ MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED :
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+ 0);
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+ if (ret < 0) {
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+ dev_err(stfcamss->dev,
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+ "Failed to link %s->%s entities: %d\n",
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+ source->name, input->name, ret);
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+ return ret;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+static int stfcamss_subdev_notifier_complete(struct v4l2_async_notifier *ntf)
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+{
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+ struct stfcamss *stfcamss =
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+ container_of(ntf, struct stfcamss, notifier);
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+
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+ return v4l2_device_register_subdev_nodes(&stfcamss->v4l2_dev);
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+}
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+
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+static const struct v4l2_async_notifier_operations
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+stfcamss_subdev_notifier_ops = {
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+ .bound = stfcamss_subdev_notifier_bound,
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+ .complete = stfcamss_subdev_notifier_complete,
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+};
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+
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+static const struct media_device_ops stfcamss_media_ops = {
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+ .link_notify = v4l2_pipeline_link_notify,
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+};
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+
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+static void stfcamss_mc_init(struct platform_device *pdev,
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+ struct stfcamss *stfcamss)
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+{
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+ stfcamss->media_dev.dev = stfcamss->dev;
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+ strscpy(stfcamss->media_dev.model, "Starfive Camera Subsystem",
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+ sizeof(stfcamss->media_dev.model));
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+ snprintf(stfcamss->media_dev.bus_info,
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+ sizeof(stfcamss->media_dev.bus_info),
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+ "%s:%s", dev_bus_name(&pdev->dev), pdev->name);
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+ stfcamss->media_dev.hw_revision = 0x01;
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+ stfcamss->media_dev.ops = &stfcamss_media_ops;
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+ media_device_init(&stfcamss->media_dev);
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+
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+ stfcamss->v4l2_dev.mdev = &stfcamss->media_dev;
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+}
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+
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+/*
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+ * stfcamss_probe - Probe STFCAMSS platform device
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+ * @pdev: Pointer to STFCAMSS platform device
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+ *
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+ * Return 0 on success or a negative error code on failure
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+ */
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+static int stfcamss_probe(struct platform_device *pdev)
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+{
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+ struct stfcamss *stfcamss;
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+ struct device *dev = &pdev->dev;
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+ int ret = 0, i, num_subdevs;
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+
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+ stfcamss = devm_kzalloc(dev, sizeof(*stfcamss), GFP_KERNEL);
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+ if (!stfcamss)
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+ return -ENOMEM;
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+
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+ for (i = 0; i < ARRAY_SIZE(stfcamss->irq); ++i) {
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+ stfcamss->irq[i] = platform_get_irq(pdev, i);
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+ if (stfcamss->irq[i] < 0)
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+ return dev_err_probe(&pdev->dev, stfcamss->irq[i],
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+ "Failed to get clock%d", i);
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+ }
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+
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+ stfcamss->nclks = ARRAY_SIZE(stfcamss->sys_clk);
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+ for (i = 0; i < ARRAY_SIZE(stfcamss->sys_clk); ++i)
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+ stfcamss->sys_clk[i].id = stfcamss_clocks[i];
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+ ret = devm_clk_bulk_get(dev, stfcamss->nclks, stfcamss->sys_clk);
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+ if (ret) {
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+ dev_err(dev, "Failed to get clk controls\n");
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+ return ret;
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+ }
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+
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+ stfcamss->nrsts = ARRAY_SIZE(stfcamss->sys_rst);
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+ for (i = 0; i < ARRAY_SIZE(stfcamss->sys_rst); ++i)
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+ stfcamss->sys_rst[i].id = stfcamss_resets[i];
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+ ret = devm_reset_control_bulk_get_shared(dev, stfcamss->nrsts,
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+ stfcamss->sys_rst);
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+ if (ret) {
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+ dev_err(dev, "Failed to get reset controls\n");
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+ return ret;
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+ }
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+
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+ ret = stfcamss_get_mem_res(pdev, stfcamss);
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+ if (ret) {
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+ dev_err(dev, "Could not map registers\n");
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+ return ret;
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+ }
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+
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+ stfcamss->dev = dev;
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+ platform_set_drvdata(pdev, stfcamss);
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+
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+ v4l2_async_nf_init(&stfcamss->notifier);
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+
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+ num_subdevs = stfcamss_of_parse_ports(stfcamss);
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+ if (num_subdevs < 0) {
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+ dev_err(dev, "Failed to find subdevices\n");
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+ return -ENODEV;
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+ }
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+
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+ stfcamss_mc_init(pdev, stfcamss);
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+
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+ ret = v4l2_device_register(stfcamss->dev, &stfcamss->v4l2_dev);
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+ if (ret < 0) {
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+ dev_err(dev, "Failed to register V4L2 device: %d\n", ret);
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+ goto err_cleanup_notifier;
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+ }
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+
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+ ret = media_device_register(&stfcamss->media_dev);
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+ if (ret) {
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+ dev_err(dev, "Failed to register media device: %d\n", ret);
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+ goto err_unregister_device;
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+ }
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+
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+ stfcamss->notifier.ops = &stfcamss_subdev_notifier_ops;
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+ ret = v4l2_async_nf_register(&stfcamss->v4l2_dev, &stfcamss->notifier);
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+ if (ret) {
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+ dev_err(dev, "Failed to register async subdev nodes: %d\n",
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+ ret);
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+ goto err_unregister_media_dev;
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+ }
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+
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+ pm_runtime_enable(dev);
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+
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+ return 0;
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+
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+err_unregister_media_dev:
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+ media_device_unregister(&stfcamss->media_dev);
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+err_unregister_device:
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+ v4l2_device_unregister(&stfcamss->v4l2_dev);
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+err_cleanup_notifier:
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+ v4l2_async_nf_cleanup(&stfcamss->notifier);
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+ return ret;
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+}
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+
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+/*
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+ * stfcamss_remove - Remove STFCAMSS platform device
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+ * @pdev: Pointer to STFCAMSS platform device
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+ *
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+ * Always returns 0.
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+ */
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+static int stfcamss_remove(struct platform_device *pdev)
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+{
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+ struct stfcamss *stfcamss = platform_get_drvdata(pdev);
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+
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+ v4l2_device_unregister(&stfcamss->v4l2_dev);
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+ media_device_cleanup(&stfcamss->media_dev);
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+ pm_runtime_disable(&pdev->dev);
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+
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+ return 0;
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+}
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+
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+static const struct of_device_id stfcamss_of_match[] = {
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+ { .compatible = "starfive,jh7110-camss" },
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+ { /* sentinel */ },
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+};
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+
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+MODULE_DEVICE_TABLE(of, stfcamss_of_match);
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+
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+static int __maybe_unused stfcamss_runtime_suspend(struct device *dev)
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+{
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+ struct stfcamss *stfcamss = dev_get_drvdata(dev);
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+
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+ reset_control_assert(stfcamss->sys_rst[STF_RST_ISP_TOP_AXI].rstc);
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+ reset_control_assert(stfcamss->sys_rst[STF_RST_ISP_TOP_N].rstc);
|
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+ clk_disable_unprepare(stfcamss->sys_clk[STF_CLK_ISP_AXI].clk);
|
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+ clk_disable_unprepare(stfcamss->sys_clk[STF_CLK_ISPCORE_2X].clk);
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+
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+ return 0;
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+}
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+
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+static int __maybe_unused stfcamss_runtime_resume(struct device *dev)
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+{
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+ struct stfcamss *stfcamss = dev_get_drvdata(dev);
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+
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+ clk_prepare_enable(stfcamss->sys_clk[STF_CLK_ISPCORE_2X].clk);
|
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+ clk_prepare_enable(stfcamss->sys_clk[STF_CLK_ISP_AXI].clk);
|
|
+ reset_control_deassert(stfcamss->sys_rst[STF_RST_ISP_TOP_N].rstc);
|
|
+ reset_control_deassert(stfcamss->sys_rst[STF_RST_ISP_TOP_AXI].rstc);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct dev_pm_ops stfcamss_pm_ops = {
|
|
+ SET_RUNTIME_PM_OPS(stfcamss_runtime_suspend,
|
|
+ stfcamss_runtime_resume,
|
|
+ NULL)
|
|
+};
|
|
+
|
|
+static struct platform_driver stfcamss_driver = {
|
|
+ .probe = stfcamss_probe,
|
|
+ .remove = stfcamss_remove,
|
|
+ .driver = {
|
|
+ .name = DRV_NAME,
|
|
+ .pm = &stfcamss_pm_ops,
|
|
+ .of_match_table = of_match_ptr(stfcamss_of_match),
|
|
+ },
|
|
+};
|
|
+
|
|
+module_platform_driver(stfcamss_driver);
|
|
+
|
|
+MODULE_AUTHOR("StarFive Corporation");
|
|
+MODULE_DESCRIPTION("StarFive Camera Subsystem driver");
|
|
+MODULE_LICENSE("GPL");
|
|
--- /dev/null
|
|
+++ b/drivers/media/platform/starfive/stf_camss.h
|
|
@@ -0,0 +1,153 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0 */
|
|
+/*
|
|
+ * stf_camss.h
|
|
+ *
|
|
+ * Starfive Camera Subsystem driver
|
|
+ *
|
|
+ * Copyright (C) 2021-2023 StarFive Technology Co., Ltd.
|
|
+ */
|
|
+
|
|
+#ifndef STF_CAMSS_H
|
|
+#define STF_CAMSS_H
|
|
+
|
|
+#include <linux/clk.h>
|
|
+#include <linux/delay.h>
|
|
+#include <linux/reset.h>
|
|
+#include <media/v4l2-device.h>
|
|
+
|
|
+#include "stf_common.h"
|
|
+
|
|
+#define DRV_NAME "starfive-camss"
|
|
+#define STF_DVP_NAME "stf_dvp"
|
|
+#define STF_CSI_NAME "cdns_csi2rx"
|
|
+#define STF_ISP_NAME "stf_isp"
|
|
+#define STF_VIN_NAME "stf_vin"
|
|
+
|
|
+#define STF_PAD_SINK 0
|
|
+#define STF_PAD_SRC 1
|
|
+#define STF_PADS_NUM 2
|
|
+
|
|
+enum port_num {
|
|
+ PORT_NUMBER_DVP_SENSOR = 0,
|
|
+ PORT_NUMBER_CSI2RX
|
|
+};
|
|
+
|
|
+enum stf_clk {
|
|
+ STF_CLK_APB_FUNC = 0,
|
|
+ STF_CLK_WRAPPER_CLK_C,
|
|
+ STF_CLK_DVP_INV,
|
|
+ STF_CLK_AXIWR,
|
|
+ STF_CLK_MIPI_RX0_PXL,
|
|
+ STF_CLK_ISPCORE_2X,
|
|
+ STF_CLK_ISP_AXI,
|
|
+ STF_CLK_NUM
|
|
+};
|
|
+
|
|
+enum stf_rst {
|
|
+ STF_RST_WRAPPER_P = 0,
|
|
+ STF_RST_WRAPPER_C,
|
|
+ STF_RST_AXIRD,
|
|
+ STF_RST_AXIWR,
|
|
+ STF_RST_ISP_TOP_N,
|
|
+ STF_RST_ISP_TOP_AXI,
|
|
+ STF_RST_NUM
|
|
+};
|
|
+
|
|
+enum stf_irq {
|
|
+ STF_IRQ_VINWR = 0,
|
|
+ STF_IRQ_ISP,
|
|
+ STF_IRQ_ISPCSIL,
|
|
+ STF_IRQ_NUM
|
|
+};
|
|
+
|
|
+#define HOST_ENTITY_MAX 2
|
|
+
|
|
+struct host_data {
|
|
+ struct media_entity *host_entity[HOST_ENTITY_MAX];
|
|
+};
|
|
+
|
|
+struct stfcamss {
|
|
+ struct v4l2_device v4l2_dev;
|
|
+ struct media_device media_dev;
|
|
+ struct media_pipeline pipe;
|
|
+ struct device *dev;
|
|
+ struct v4l2_async_notifier notifier;
|
|
+ struct host_data host_data;
|
|
+ void __iomem *syscon_base;
|
|
+ void __iomem *isp_base;
|
|
+ int irq[STF_IRQ_NUM];
|
|
+ struct clk_bulk_data sys_clk[STF_CLK_NUM];
|
|
+ int nclks;
|
|
+ struct reset_control_bulk_data sys_rst[STF_RST_NUM];
|
|
+ int nrsts;
|
|
+};
|
|
+
|
|
+struct stfcamss_async_subdev {
|
|
+ struct v4l2_async_subdev asd; /* must be first */
|
|
+ enum port_num port;
|
|
+};
|
|
+
|
|
+static inline u32 stf_isp_reg_read(struct stfcamss *stfcamss, u32 reg)
|
|
+{
|
|
+ return ioread32(stfcamss->isp_base + reg);
|
|
+}
|
|
+
|
|
+static inline void stf_isp_reg_write(struct stfcamss *stfcamss,
|
|
+ u32 reg, u32 val)
|
|
+{
|
|
+ iowrite32(val, stfcamss->isp_base + reg);
|
|
+}
|
|
+
|
|
+static inline void stf_isp_reg_write_delay(struct stfcamss *stfcamss,
|
|
+ u32 reg, u32 val, u32 delay)
|
|
+{
|
|
+ iowrite32(val, stfcamss->isp_base + reg);
|
|
+ usleep_range(1000 * delay, 1000 * delay + 100);
|
|
+}
|
|
+
|
|
+static inline void stf_isp_reg_set_bit(struct stfcamss *stfcamss,
|
|
+ u32 reg, u32 mask, u32 val)
|
|
+{
|
|
+ u32 value;
|
|
+
|
|
+ value = ioread32(stfcamss->isp_base + reg) & ~mask;
|
|
+ val &= mask;
|
|
+ val |= value;
|
|
+ iowrite32(val, stfcamss->isp_base + reg);
|
|
+}
|
|
+
|
|
+static inline void stf_isp_reg_set(struct stfcamss *stfcamss, u32 reg, u32 mask)
|
|
+{
|
|
+ iowrite32(ioread32(stfcamss->isp_base + reg) | mask,
|
|
+ stfcamss->isp_base + reg);
|
|
+}
|
|
+
|
|
+static inline u32 stf_syscon_reg_read(struct stfcamss *stfcamss, u32 reg)
|
|
+{
|
|
+ return ioread32(stfcamss->syscon_base + reg);
|
|
+}
|
|
+
|
|
+static inline void stf_syscon_reg_write(struct stfcamss *stfcamss,
|
|
+ u32 reg, u32 val)
|
|
+{
|
|
+ iowrite32(val, stfcamss->syscon_base + reg);
|
|
+}
|
|
+
|
|
+static inline void stf_syscon_reg_set_bit(struct stfcamss *stfcamss,
|
|
+ u32 reg, u32 bit_mask)
|
|
+{
|
|
+ u32 value;
|
|
+
|
|
+ value = ioread32(stfcamss->syscon_base + reg);
|
|
+ iowrite32(value | bit_mask, stfcamss->syscon_base + reg);
|
|
+}
|
|
+
|
|
+static inline void stf_syscon_reg_clear_bit(struct stfcamss *stfcamss,
|
|
+ u32 reg, u32 bit_mask)
|
|
+{
|
|
+ u32 value;
|
|
+
|
|
+ value = ioread32(stfcamss->syscon_base + reg);
|
|
+ iowrite32(value & ~bit_mask, stfcamss->syscon_base + reg);
|
|
+}
|
|
+#endif /* STF_CAMSS_H */
|
|
--- /dev/null
|
|
+++ b/drivers/media/platform/starfive/stf_common.h
|
|
@@ -0,0 +1,18 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0 */
|
|
+/*
|
|
+ * stf_common.h
|
|
+ *
|
|
+ * StarFive Camera Subsystem - Common definitions
|
|
+ *
|
|
+ * Copyright (C) 2021-2023 StarFive Technology Co., Ltd.
|
|
+ */
|
|
+
|
|
+#ifndef STF_COMMON_H
|
|
+#define STF_COMMON_H
|
|
+
|
|
+enum stf_subdev_type {
|
|
+ STF_SUBDEV_TYPE_VIN,
|
|
+ STF_SUBDEV_TYPE_ISP,
|
|
+};
|
|
+
|
|
+#endif /* STF_COMMON_H */
|