openwrt/target/linux/ramips/dts/MT7620a_V22SG.dts
Adrian Schmutzler 9f99000165 ramips/mt7620: Synchronize Makefiles with DTS compatible
This will "rename" devices in Makefiles to the pattern used in
DTS compatible. This will systematize naming of devices
enormously.

As device names are used to for default SUPPORTED_DEVICES entries,
we need to adjust the source for /tmp/sysinfo/board_name, too.
So remove relevant entries from base-files/lib/ramips.sh and
use device compatible for that.

Despite that, base-files are updated, too.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-07-10 17:36:29 +02:00

121 lines
1.8 KiB
Plaintext

/dts-v1/;
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "ralink,mt7620a-v22sg-evb", "ralink,mt7620a-soc";
model = "Ralink MT7620a V22SG High Power evaluation board";
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
aoss {
label = "aoss";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
nand {
compatible = "mtk,mt7620-nand";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x40000 0x20000>;
read-only;
};
factory: partition@60000 {
label = "factory";
reg = <0x60000 0x20000>;
read-only;
};
partition@80000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x80000 0x7f80000>;
};
};
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "i2c", "uartf", "spi";
ralink,function = "gpio";
};
};
};
&ethernet {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
mediatek,portmap = "llllw";
port@4 {
status = "okay";
phy-handle = <&phy4>;
phy-mode = "rgmii";
};
port@5 {
status = "okay";
phy-handle = <&phy5>;
phy-mode = "rgmii";
};
mdio-bus {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
phy5: ethernet-phy@5 {
reg = <5>;
phy-mode = "rgmii";
};
};
};
&gsw {
mediatek,port4 = "gmac";
};
&pcie {
status = "okay";
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};