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0e6179e50e
Some MT7915 calibration data consists of two parts. The first part "eeprom" size is 0xe00. The second part "precal" size is 0x19c10. Though some devices may not have precal data, it's better to assume that precal data exists as no users/developers confirm it. On the other hand, some devices definitely do not contain precal data because the EEPROM partition size is smaller than the precal NVMEM cell size. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
198 lines
3.2 KiB
Plaintext
198 lines
3.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "asus,rt-ax54", "mediatek,mt7621-soc";
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model = "ASUS RT-AX54";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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label-mac-device = &gmac0;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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bootargs-override = "console=ttyS0,115200";
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};
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leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "blue:power";
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color = <LED_COLOR_ID_BLUE>;
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function = LED_FUNCTION_POWER;
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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key-restart {
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label = "reset";
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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key-wps {
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label = "wps";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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};
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&nand {
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status = "okay";
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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mediatek,bmt-remap-range = <0x000000 0x7e0000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x80000>;
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read-only;
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};
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/*
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* u-boot gets split here while keeping u-boot read-only,
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* which allows safe usage of fw_setenv
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*/
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partition@80000 {
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label = "u-boot-env";
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reg = <0x80000 0x60000>;
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};
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partition@e0000 {
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label = "nvram";
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reg = <0xe0000 0x100000>;
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read-only;
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};
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factory: partition@1e0000 {
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label = "factory";
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reg = <0x1e0000 0x100000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0xe00>;
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};
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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precal_factory_e10: precal@e10 {
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reg = <0xe10 0x19c10>;
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};
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};
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};
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factory2: partition@2e0000 {
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label = "factory2";
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reg = <0x2e0000 0x100000>;
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read-only;
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};
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partition@3e0000 {
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label = "kernel";
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reg = <0x3e0000 0x400000>;
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};
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partition@7e0000 {
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label = "ubi";
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reg = <0x7e0000 0x7020000>;
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};
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/* Last 8M are reserved for NMBM management (bad blocks) */
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie1 {
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_0>, <&precal_factory_e10>;
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nvmem-cell-names = "eeprom", "precal";
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mediatek,disable-radar-background;
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};
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};
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&gmac0 {
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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};
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&gmac1 {
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status = "okay";
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label = "wan";
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phy-handle = <ðphy4>;
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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};
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&mdio {
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ethphy4: ethernet-phy@4 {
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reg = <4>;
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};
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};
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&switch0 {
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ports {
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port@0 {
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status = "okay";
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label = "lan4";
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};
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port@1 {
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status = "okay";
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label = "lan3";
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};
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port@2 {
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status = "okay";
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label = "lan2";
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};
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port@3 {
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status = "okay";
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label = "lan1";
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};
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};
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};
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&state_default {
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gpio {
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groups = "i2c", "uart2", "uart3", "jtag", "wdt";
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function = "gpio";
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};
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};
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