openwrt/target/linux/ramips/dts/mt7621_asus_rt-ax54.dts
Shiji Yang 0e6179e50e
ramips: mt7621: convert MT7915 EEPROM to NVMEM format
Some MT7915 calibration data consists of two parts. The first part
"eeprom" size is 0xe00. The second part "precal" size is 0x19c10.

Though some devices may not have precal data, it's better to assume
that precal data exists as no users/developers confirm it. On the
other hand, some devices definitely do not contain precal data
because the EEPROM partition size is smaller than the precal NVMEM
cell size.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2024-01-17 01:14:46 +01:00

198 lines
3.2 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "asus,rt-ax54", "mediatek,mt7621-soc";
model = "ASUS RT-AX54";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = &gmac0;
};
chosen {
bootargs = "console=ttyS0,115200";
bootargs-override = "console=ttyS0,115200";
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "blue:power";
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
key-restart {
label = "reset";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
key-wps {
label = "wps";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
};
&nand {
status = "okay";
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
mediatek,bmt-remap-range = <0x000000 0x7e0000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x80000>;
read-only;
};
/*
* u-boot gets split here while keeping u-boot read-only,
* which allows safe usage of fw_setenv
*/
partition@80000 {
label = "u-boot-env";
reg = <0x80000 0x60000>;
};
partition@e0000 {
label = "nvram";
reg = <0xe0000 0x100000>;
read-only;
};
factory: partition@1e0000 {
label = "factory";
reg = <0x1e0000 0x100000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0xe00>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
precal_factory_e10: precal@e10 {
reg = <0xe10 0x19c10>;
};
};
};
factory2: partition@2e0000 {
label = "factory2";
reg = <0x2e0000 0x100000>;
read-only;
};
partition@3e0000 {
label = "kernel";
reg = <0x3e0000 0x400000>;
};
partition@7e0000 {
label = "ubi";
reg = <0x7e0000 0x7020000>;
};
/* Last 8M are reserved for NMBM management (bad blocks) */
};
};
&pcie {
status = "okay";
};
&pcie1 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_0>, <&precal_factory_e10>;
nvmem-cell-names = "eeprom", "precal";
mediatek,disable-radar-background;
};
};
&gmac0 {
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&ethphy4>;
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
};
&mdio {
ethphy4: ethernet-phy@4 {
reg = <4>;
};
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "lan4";
};
port@1 {
status = "okay";
label = "lan3";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan1";
};
};
};
&state_default {
gpio {
groups = "i2c", "uart2", "uart3", "jtag", "wdt";
function = "gpio";
};
};