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659f4a13dd
With Linux 6.1 many of our downstream patches and out-of-tree files can be removed or at least replaced by backported upstream commits. Signed-off-by: Daniel Golle <daniel@makrotopia.org> [fix CMDLINE_OVERRIDE for arm64] Signed-off-by: Bjørn Mork <bjorn@mork.no>
58 lines
2.2 KiB
Diff
58 lines
2.2 KiB
Diff
From 7b438d0377fbd520b475a68bdd9de1692393f22d Mon Sep 17 00:00:00 2001
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From: Mengqi Zhang <mengqi.zhang@mediatek.com>
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Date: Sun, 6 Nov 2022 11:39:24 +0800
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Subject: [PATCH 2/6] mmc: mtk-sd: add Inline Crypto Engine clock control
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Add crypto clock control and ungate it before CQHCI init.
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Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.com>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Link: https://lore.kernel.org/r/20221106033924.9854-2-mengqi.zhang@mediatek.com
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Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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---
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drivers/mmc/host/mtk-sd.c | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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--- a/drivers/mmc/host/mtk-sd.c
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+++ b/drivers/mmc/host/mtk-sd.c
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@@ -452,6 +452,7 @@ struct msdc_host {
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struct clk *bus_clk; /* bus clock which used to access register */
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struct clk *src_clk_cg; /* msdc source clock control gate */
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struct clk *sys_clk_cg; /* msdc subsys clock control gate */
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+ struct clk *crypto_clk; /* msdc crypto clock control gate */
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struct clk_bulk_data bulk_clks[MSDC_NR_CLOCKS];
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u32 mclk; /* mmc subsystem clock frequency */
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u32 src_clk_freq; /* source clock frequency */
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@@ -840,6 +841,7 @@ static void msdc_set_busy_timeout(struct
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static void msdc_gate_clock(struct msdc_host *host)
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{
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clk_bulk_disable_unprepare(MSDC_NR_CLOCKS, host->bulk_clks);
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+ clk_disable_unprepare(host->crypto_clk);
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clk_disable_unprepare(host->src_clk_cg);
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clk_disable_unprepare(host->src_clk);
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clk_disable_unprepare(host->bus_clk);
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@@ -855,6 +857,7 @@ static int msdc_ungate_clock(struct msdc
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clk_prepare_enable(host->bus_clk);
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clk_prepare_enable(host->src_clk);
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clk_prepare_enable(host->src_clk_cg);
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+ clk_prepare_enable(host->crypto_clk);
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ret = clk_bulk_prepare_enable(MSDC_NR_CLOCKS, host->bulk_clks);
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if (ret) {
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dev_err(host->dev, "Cannot enable pclk/axi/ahb clock gates\n");
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@@ -2670,6 +2673,15 @@ static int msdc_drv_probe(struct platfor
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goto host_free;
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}
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+ /* only eMMC has crypto property */
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+ if (!(mmc->caps2 & MMC_CAP2_NO_MMC)) {
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+ host->crypto_clk = devm_clk_get_optional(&pdev->dev, "crypto");
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+ if (IS_ERR(host->crypto_clk))
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+ host->crypto_clk = NULL;
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+ else
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+ mmc->caps2 |= MMC_CAP2_CRYPTO;
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+ }
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+
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host->irq = platform_get_irq(pdev, 0);
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if (host->irq < 0) {
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ret = host->irq;
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