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23deb4ac90
Introduce support for the Qualcomm IPQ60xx SoC. WiFi support still has to be handled and correctly fix hence this is currently marked as source-only to have a solid base to progress on correct support of this and hope Upstream QUIC publish newers ath11k drivers for this SoC. Co-developed-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Mantas Pucka <mantas@8devices.com> [ improve commit description, add SoB for Robert, make it source-only ] Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
103 lines
4.3 KiB
Diff
103 lines
4.3 KiB
Diff
From 62a5df451ab911421da96655fcc4d1e269ff6e2f Mon Sep 17 00:00:00 2001
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From: Mantas Pucka <mantas@8devices.com>
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Date: Tue, 23 Jan 2024 18:09:20 +0200
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Subject: [PATCH] phy: qcom-qmp-usb: fix serdes init sequence for IPQ6018
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Commit 23fd679249df ("phy: qcom-qmp: add USB3 PHY support for IPQ6018")
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noted that IPQ6018 init is identical to IPQ8074. Yet downstream uses
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separate serdes init sequence for IPQ6018. Since already existing IPQ9574
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serdes init sequence is identical, just reuse it and fix failing USB3 mode
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in IPQ6018.
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Fixes: 23fd679249df ("phy: qcom-qmp: add USB3 PHY support for IPQ6018")
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Signed-off-by: Mantas Pucka <mantas@8devices.com>
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Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Link: https://lore.kernel.org/r/1706026160-17520-3-git-send-email-mantas@8devices.com
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Signed-off-by: Vinod Koul <vkoul@kernel.org>
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---
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drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 20 +++++++++++++++++++-
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1 file changed, 19 insertions(+), 1 deletion(-)
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--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
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+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
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@@ -233,6 +233,43 @@ static const struct qmp_phy_init_tbl ipq
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QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M3P5DB_V0, 0x0f),
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};
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+static const struct qmp_phy_init_tbl ipq9574_usb3_serdes_tbl[] = {
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+ QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_EN_SEL, 0x1a),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CLKBUFLR_EN, 0x08),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_CLK_SELECT, 0x30),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_BG_TRIM, 0x0f),
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+ QMP_PHY_INIT_CFG(QSERDES_RX_UCDR_FASTLOCK_FO_GAIN, 0x0b),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_SVS_MODE_CLK_SEL, 0x01),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_HSCLK_SEL, 0x00),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_CMN_CONFIG, 0x06),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_PLL_IVCO, 0x0f),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_SYS_CLK_CTRL, 0x06),
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+ /* PLL and Loop filter settings */
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+ QMP_PHY_INIT_CFG(QSERDES_COM_DEC_START_MODE0, 0x68),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START1_MODE0, 0xab),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START2_MODE0, 0xaa),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_DIV_FRAC_START3_MODE0, 0x02),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_CP_CTRL_MODE0, 0x09),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_PLL_RCTRL_MODE0, 0x16),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_PLL_CCTRL_MODE0, 0x28),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_INTEGLOOP_GAIN0_MODE0, 0xa0),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP1_MODE0, 0xaa),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP2_MODE0, 0x29),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP3_MODE0, 0x00),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_CORE_CLK_EN, 0x00),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_LOCK_CMP_CFG, 0x00),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_VCO_TUNE_MAP, 0x00),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_BG_TIMER, 0x0a),
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+ /* SSC settings */
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+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_EN_CENTER, 0x01),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER1, 0x7d),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_PER2, 0x01),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_ADJ_PER1, 0x00),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_ADJ_PER2, 0x00),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE1, 0x0a),
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+ QMP_PHY_INIT_CFG(QSERDES_COM_SSC_STEP_SIZE2, 0x05),
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+};
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+
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static const struct qmp_phy_init_tbl msm8996_usb3_serdes_tbl[] = {
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QMP_PHY_INIT_CFG(QSERDES_COM_SYSCLK_EN_SEL, 0x14),
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QMP_PHY_INIT_CFG(QSERDES_COM_BIAS_EN_CLKBUFLR_EN, 0x08),
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@@ -1591,6 +1628,26 @@ static const char * const qmp_phy_vreg_l
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"vdda-phy", "vdda-pll",
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};
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+static const struct qmp_phy_cfg ipq6018_usb3phy_cfg = {
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+ .lanes = 1,
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+
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+ .serdes_tbl = ipq9574_usb3_serdes_tbl,
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+ .serdes_tbl_num = ARRAY_SIZE(ipq9574_usb3_serdes_tbl),
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+ .tx_tbl = msm8996_usb3_tx_tbl,
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+ .tx_tbl_num = ARRAY_SIZE(msm8996_usb3_tx_tbl),
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+ .rx_tbl = ipq8074_usb3_rx_tbl,
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+ .rx_tbl_num = ARRAY_SIZE(ipq8074_usb3_rx_tbl),
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+ .pcs_tbl = ipq8074_usb3_pcs_tbl,
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+ .pcs_tbl_num = ARRAY_SIZE(ipq8074_usb3_pcs_tbl),
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+ .clk_list = msm8996_phy_clk_l,
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+ .num_clks = ARRAY_SIZE(msm8996_phy_clk_l),
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+ .reset_list = msm8996_usb3phy_reset_l,
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+ .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l),
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+ .vreg_list = qmp_phy_vreg_l,
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+ .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
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+ .regs = qmp_v3_usb3phy_regs_layout,
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+};
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+
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static const struct qmp_phy_cfg ipq8074_usb3phy_cfg = {
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.lanes = 1,
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@@ -2534,7 +2591,7 @@ static const struct of_device_id qmp_usb
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.data = &msm8996_usb3phy_cfg,
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}, {
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.compatible = "qcom,ipq6018-qmp-usb3-phy",
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- .data = &ipq8074_usb3phy_cfg,
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+ .data = &ipq6018_usb3phy_cfg,
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}, {
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.compatible = "qcom,sc7180-qmp-usb3-phy",
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.data = &sc7180_usb3phy_cfg,
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