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c93c5365c0
Pick patches with several fixes and improvements, preparation for upcoming WED (TX) [1] as well as basic XDP support [2] with MediaTek's Filogic SoCs to the mtk_eth_soc driver. Also pick follow-up patch fixing Ethernet on MT7621 [3]. Tested on Bananapi BPi-R3 (MT7986), Bananapi BPi-R64 (MT7622), Bananapi BPi-R2 (MT7623), MikroTik RouterBoard M11G (MT7621). [1]: https://patchwork.kernel.org/project/netdevbpf/list/?series=662108&state=* [2]: https://patchwork.kernel.org/project/netdevbpf/list/?series=675368&state=* (the first part of the series adding wed nodes to mt7986a.dtsi was applied to the copy of mt7986a.dtsi in our tree) [3]: https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git/commit/?id=5e69163d3b9931098922b3fc2f8e786af8c1f37e Signed-off-by: Daniel Golle <daniel@makrotopia.org>
200 lines
7.0 KiB
Diff
200 lines
7.0 KiB
Diff
From patchwork Thu Sep 8 19:33:38 2022
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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X-Patchwork-Submitter: Lorenzo Bianconi <lorenzo@kernel.org>
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X-Patchwork-Id: 12970557
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X-Patchwork-Delegate: kuba@kernel.org
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From: Lorenzo Bianconi <lorenzo@kernel.org>
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To: netdev@vger.kernel.org
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Cc: nbd@nbd.name, john@phrozen.org, sean.wang@mediatek.com,
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Mark-MC.Lee@mediatek.com, davem@davemloft.net, edumazet@google.com,
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kuba@kernel.org, pabeni@redhat.com, matthias.bgg@gmail.com,
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linux-mediatek@lists.infradead.org, lorenzo.bianconi@redhat.com,
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Bo.Jiao@mediatek.com, sujuan.chen@mediatek.com,
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ryder.Lee@mediatek.com, evelyn.tsai@mediatek.com,
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devicetree@vger.kernel.org, robh@kernel.org
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Subject: [PATCH net-next 04/12] net: ethernet: mtk_eth_soc: move ppe table
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hash offset to mtk_soc_data structure
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Date: Thu, 8 Sep 2022 21:33:38 +0200
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Message-Id:
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<cc263ffeaa3e1d7314e36a4f941e96d38e41a6bf.1662661555.git.lorenzo@kernel.org>
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X-Mailer: git-send-email 2.37.3
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In-Reply-To: <cover.1662661555.git.lorenzo@kernel.org>
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References: <cover.1662661555.git.lorenzo@kernel.org>
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MIME-Version: 1.0
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Precedence: bulk
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List-ID: <netdev.vger.kernel.org>
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X-Mailing-List: netdev@vger.kernel.org
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X-Patchwork-Delegate: kuba@kernel.org
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This is a preliminary patch to introduce mt7986 hw packet engine.
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Co-developed-by: Bo Jiao <Bo.Jiao@mediatek.com>
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Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com>
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Co-developed-by: Sujuan Chen <sujuan.chen@mediatek.com>
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Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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---
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drivers/net/ethernet/mediatek/mtk_eth_soc.c | 4 ++++
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drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 ++
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drivers/net/ethernet/mediatek/mtk_ppe.c | 24 +++++++++++++++------
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drivers/net/ethernet/mediatek/mtk_ppe.h | 2 +-
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4 files changed, 25 insertions(+), 7 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -4150,6 +4150,7 @@ static const struct mtk_soc_data mt7621_
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.required_clks = MT7621_CLKS_BITMAP,
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.required_pctl = false,
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.offload_version = 2,
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+ .hash_offset = 2,
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.txrx = {
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.txd_size = sizeof(struct mtk_tx_dma),
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.rxd_size = sizeof(struct mtk_rx_dma),
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@@ -4168,6 +4169,7 @@ static const struct mtk_soc_data mt7622_
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.required_clks = MT7622_CLKS_BITMAP,
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.required_pctl = false,
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.offload_version = 2,
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+ .hash_offset = 2,
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.txrx = {
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.txd_size = sizeof(struct mtk_tx_dma),
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.rxd_size = sizeof(struct mtk_rx_dma),
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@@ -4185,6 +4187,7 @@ static const struct mtk_soc_data mt7623_
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.required_clks = MT7623_CLKS_BITMAP,
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.required_pctl = true,
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.offload_version = 2,
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+ .hash_offset = 2,
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.txrx = {
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.txd_size = sizeof(struct mtk_tx_dma),
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.rxd_size = sizeof(struct mtk_rx_dma),
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@@ -4218,6 +4221,7 @@ static const struct mtk_soc_data mt7986_
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.caps = MT7986_CAPS,
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.required_clks = MT7986_CLKS_BITMAP,
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.required_pctl = false,
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+ .hash_offset = 4,
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.txrx = {
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.txd_size = sizeof(struct mtk_tx_dma_v2),
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.rxd_size = sizeof(struct mtk_rx_dma_v2),
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -966,6 +966,7 @@ struct mtk_reg_map {
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* the target SoC
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* @required_pctl A bool value to show whether the SoC requires
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* the extra setup for those pins used by GMAC.
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+ * @hash_offset Flow table hash offset.
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* @txd_size Tx DMA descriptor size.
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* @rxd_size Rx DMA descriptor size.
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* @rx_irq_done_mask Rx irq done register mask.
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@@ -980,6 +981,7 @@ struct mtk_soc_data {
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u32 required_clks;
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bool required_pctl;
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u8 offload_version;
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+ u8 hash_offset;
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netdev_features_t hw_features;
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struct {
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u32 txd_size;
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--- a/drivers/net/ethernet/mediatek/mtk_ppe.c
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+++ b/drivers/net/ethernet/mediatek/mtk_ppe.c
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@@ -88,7 +88,7 @@ static void mtk_ppe_cache_enable(struct
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enable * MTK_PPE_CACHE_CTL_EN);
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}
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-static u32 mtk_ppe_hash_entry(struct mtk_foe_entry *e)
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+static u32 mtk_ppe_hash_entry(struct mtk_eth *eth, struct mtk_foe_entry *e)
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{
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u32 hv1, hv2, hv3;
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u32 hash;
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@@ -122,7 +122,7 @@ static u32 mtk_ppe_hash_entry(struct mtk
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hash = (hash >> 24) | ((hash & 0xffffff) << 8);
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hash ^= hv1 ^ hv2 ^ hv3;
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hash ^= hash >> 16;
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- hash <<= 1;
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+ hash <<= (ffs(eth->soc->hash_offset) - 1);
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hash &= MTK_PPE_ENTRIES - 1;
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return hash;
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@@ -540,15 +540,16 @@ mtk_foe_entry_commit_l2(struct mtk_ppe *
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int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry)
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{
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int type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->data.ib1);
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+ const struct mtk_soc_data *soc = ppe->eth->soc;
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u32 hash;
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if (type == MTK_PPE_PKT_TYPE_BRIDGE)
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return mtk_foe_entry_commit_l2(ppe, entry);
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- hash = mtk_ppe_hash_entry(&entry->data);
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+ hash = mtk_ppe_hash_entry(ppe->eth, &entry->data);
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entry->hash = 0xffff;
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spin_lock_bh(&ppe_lock);
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- hlist_add_head(&entry->list, &ppe->foe_flow[hash / 2]);
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+ hlist_add_head(&entry->list, &ppe->foe_flow[hash / soc->hash_offset]);
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spin_unlock_bh(&ppe_lock);
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return 0;
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@@ -558,6 +559,7 @@ static void
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mtk_foe_entry_commit_subflow(struct mtk_ppe *ppe, struct mtk_flow_entry *entry,
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u16 hash)
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{
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+ const struct mtk_soc_data *soc = ppe->eth->soc;
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struct mtk_flow_entry *flow_info;
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struct mtk_foe_entry foe, *hwe;
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struct mtk_foe_mac_info *l2;
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@@ -572,7 +574,8 @@ mtk_foe_entry_commit_subflow(struct mtk_
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flow_info->l2_data.base_flow = entry;
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flow_info->type = MTK_FLOW_TYPE_L2_SUBFLOW;
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flow_info->hash = hash;
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- hlist_add_head(&flow_info->list, &ppe->foe_flow[hash / 2]);
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+ hlist_add_head(&flow_info->list,
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+ &ppe->foe_flow[hash / soc->hash_offset]);
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hlist_add_head(&flow_info->l2_data.list, &entry->l2_flows);
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hwe = &ppe->foe_table[hash];
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@@ -596,7 +599,8 @@ mtk_foe_entry_commit_subflow(struct mtk_
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void __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash)
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{
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- struct hlist_head *head = &ppe->foe_flow[hash / 2];
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+ const struct mtk_soc_data *soc = ppe->eth->soc;
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+ struct hlist_head *head = &ppe->foe_flow[hash / soc->hash_offset];
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struct mtk_foe_entry *hwe = &ppe->foe_table[hash];
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struct mtk_flow_entry *entry;
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struct mtk_foe_bridge key = {};
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@@ -680,9 +684,11 @@ int mtk_foe_entry_idle_time(struct mtk_p
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struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base,
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int version)
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{
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+ const struct mtk_soc_data *soc = eth->soc;
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struct device *dev = eth->dev;
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struct mtk_foe_entry *foe;
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struct mtk_ppe *ppe;
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+ u32 foe_flow_size;
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ppe = devm_kzalloc(dev, sizeof(*ppe), GFP_KERNEL);
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if (!ppe)
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@@ -705,6 +711,12 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_
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ppe->foe_table = foe;
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+ foe_flow_size = (MTK_PPE_ENTRIES / soc->hash_offset) *
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+ sizeof(*ppe->foe_flow);
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+ ppe->foe_flow = devm_kzalloc(dev, foe_flow_size, GFP_KERNEL);
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+ if (!ppe->foe_flow)
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+ return NULL;
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+
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mtk_ppe_debugfs_init(ppe);
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return ppe;
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--- a/drivers/net/ethernet/mediatek/mtk_ppe.h
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+++ b/drivers/net/ethernet/mediatek/mtk_ppe.h
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@@ -270,7 +270,7 @@ struct mtk_ppe {
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dma_addr_t foe_phys;
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u16 foe_check_time[MTK_PPE_ENTRIES];
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- struct hlist_head foe_flow[MTK_PPE_ENTRIES / 2];
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+ struct hlist_head *foe_flow;
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struct rhashtable l2_flows;
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