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e05b24175d
Reorder nanopc t6 patches to 055 to avoid conflict with nanopi r6c patches.
Fixes: 55c46cbabd ("rockchip: add FriendlyElec NanoPi R6C")
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/16461
Signed-off-by: Nick Hainke <vincent@systemli.org>
54 lines
1.5 KiB
Diff
54 lines
1.5 KiB
Diff
From b70caff0f9592719b6c977e291c33192e959c9d4 Mon Sep 17 00:00:00 2001
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From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
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Date: Thu, 29 Aug 2024 14:26:57 +0200
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Subject: [PATCH] arm64: dts: rockchip: add IR-receiver to NanoPC-T6
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FriendlyELEC NanoPC-T6 has IR receiver connected to PWM3_IR_M0 line
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which ends as GPIO0_D4.
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Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
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Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-6-edff247e8c02@linaro.org
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 ++++++++++++++-
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1 file changed, 14 insertions(+), 1 deletion(-)
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--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
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@@ -25,6 +25,13 @@
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stdout-path = "serial2:1500000n8";
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};
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+ ir-receiver {
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+ compatible = "gpio-ir-receiver";
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+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&ir_receiver_pin>;
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+ };
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+
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leds {
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compatible = "gpio-leds";
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@@ -228,7 +235,7 @@
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"HEADER_10", "HEADER_08", "HEADER_32", "",
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/* GPIO0 D0-D7 */
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"", "", "", "",
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- "", "", "", "";
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+ "IR receiver [PWM3_IR_M0]", "", "", "";
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};
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&gpio1 {
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@@ -492,6 +499,12 @@
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};
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};
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+ ir-receiver {
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+ ir_receiver_pin: ir-receiver-pin {
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+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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pcie {
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pcie2_0_rst: pcie2-0-rst {
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rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
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