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8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
61 lines
2.4 KiB
Diff
61 lines
2.4 KiB
Diff
From 58d65d7d1c7b86291acaddea1606d884d5736ff0 Mon Sep 17 00:00:00 2001
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From: Dom Cobley <popcornmix@gmail.com>
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Date: Thu, 27 Jan 2022 15:32:04 +0000
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Subject: [PATCH 0023/1085] vc4/drm:plane: Make use of chroma siting parameter
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Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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---
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drivers/gpu/drm/vc4/vc4_plane.c | 13 +++++++++----
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1 file changed, 9 insertions(+), 4 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_plane.c
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+++ b/drivers/gpu/drm/vc4/vc4_plane.c
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@@ -535,17 +535,18 @@ static void vc4_write_tpz(struct vc4_pla
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/* phase magnitude bits */
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#define PHASE_BITS 6
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-static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst, u32 xy, int channel)
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+static void vc4_write_ppf(struct vc4_plane_state *vc4_state, u32 src, u32 dst, u32 xy, int channel, int chroma_offset)
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{
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u32 scale = src / dst;
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s32 offset, offset2;
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s32 phase;
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/* Start the phase at 1/2 pixel from the 1st pixel at src_x.
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- 1/4 pixel for YUV. */
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+ 1/4 pixel for YUV, plus the offset for chroma siting */
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if (channel) {
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/* the phase is relative to scale_src->x, so shift it for display list's x value */
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offset = (xy & 0x1ffff) >> (16 - PHASE_BITS) >> 1;
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+ offset -= chroma_offset >> (17 - PHASE_BITS);
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offset += -(1 << PHASE_BITS >> 2);
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} else {
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/* the phase is relative to scale_src->x, so shift it for display list's x value */
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@@ -631,13 +632,15 @@ static void vc4_write_scaling_parameters
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/* Ch0 H-PPF Word 0: Scaling Parameters */
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if (vc4_state->x_scaling[channel] == VC4_SCALING_PPF) {
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vc4_write_ppf(vc4_state,
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- vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x, channel);
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+ vc4_state->src_w[channel], vc4_state->crtc_w, vc4_state->src_x, channel,
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+ state->chroma_siting_h);
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}
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/* Ch0 V-PPF Words 0-1: Scaling Parameters, Context */
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if (vc4_state->y_scaling[channel] == VC4_SCALING_PPF) {
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vc4_write_ppf(vc4_state,
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- vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y, channel);
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+ vc4_state->src_h[channel], vc4_state->crtc_h, vc4_state->src_y, channel,
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+ state->chroma_siting_v);
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vc4_dlist_write(vc4_state, 0xc0c0c0c0);
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}
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@@ -1718,6 +1721,8 @@ struct drm_plane *vc4_plane_init(struct
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DRM_COLOR_YCBCR_BT709,
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DRM_COLOR_YCBCR_LIMITED_RANGE);
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+ drm_plane_create_chroma_siting_properties(plane, 0, 0);
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+
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if (type == DRM_PLANE_TYPE_PRIMARY)
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drm_plane_create_zpos_immutable_property(plane, 0);
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