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Qualcomm Atheros IPQ807x is a modern WiSoC featuring: * Quad Core ARMv8 Cortex A-53 * @ 2.2 GHz (IPQ8072A/4A/6A/8A) Codename Hawkeye * @ 1.4 GHz (IPQ8070A/1A) Codename Acorn * Dual Band simultaneaous IEEE 802.11ax * 5G: 8x8/80 or 4x4/160MHz (IPQ8074A/8A) * 5G: 4x4/80 or 2x2/160MHz (IPQ8071A/2A/6A) * 5G: 2x2/80MHz (IPQ8070A) * 2G: 4x4/40MHz (IPQ8072A/4A/6A/8A) * 2G: 2x2/40MHz (IPQ8070A/1A) * 1x PSGMII via QCA8072/5 (Max 5x 1GbE ports) * 2x SGMII/USXGMII (1/2.5/5/10 GbE) on Hawkeye * 2x SGMII/USXGMII (1/2.5/5 GbE) on Acorn * DDR3L/4 32/16 bit up to 2400MT/s * SDIO 3.0/SD card 3.0/eMMC 5.1 * Dual USB 3.0 * One PCIe Gen2.1 and one PCIe Gen3.0 port (Single lane) * Parallel NAND (ONFI)/LCD * 6x QUP BLSP SPI/I2C/UART * I2S, PCM, and TDMA * HW PWM * 1.8V configurable GPIO * Companion PMP8074 PMIC via SPMI (GPIOS, RTC etc) Note that only v2 SOC models aka the ones ending with A suffix are supported, v1 models do not comply to the final 802.11ax and have lower clocks, lack the Gen3 PCIe etc. SoC itself has two UBI32 cores for the NSS offloading system, however currently no offloading is supported. Signed-off-by: Robert Marko <robimarko@gmail.com>
208 lines
7.2 KiB
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208 lines
7.2 KiB
Diff
From 77faa07c185c969e742cbb3e6aa487a11b0b616c Mon Sep 17 00:00:00 2001
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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Date: Tue, 30 Aug 2022 09:57:42 +0300
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Subject: [PATCH] dt-bindings: arm: qcom: document qcom,msm-id and
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qcom,board-id
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The top level qcom,msm-id and qcom,board-id properties are utilized by
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bootloaders on Qualcomm MSM platforms to determine which device tree
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should be used and passed to the kernel.
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The commit b32e592d3c28 ("devicetree: bindings: Document qcom board
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compatible format") from 2015 was a consensus during discussion about
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upstreaming qcom,msm-id and qcom,board-id fields. There are however still
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problems with that consensus:
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1. It was reached 7 years ago but it turned out its implementation did
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not reach all possible products.
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2. Initially additional tool (dtbTool) was needed for parsing these
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fields to create a QCDT image consisting of multiple DTBs, later the
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bootloaders were improved and they use these qcom,msm-id and
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qcom,board-id properties directly.
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3. Extracting relevant information from the board compatible requires
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this additional tool (dtbTool), which makes the build process more
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complicated and not easily reproducible (DTBs are modified after the
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kernel build).
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4. Some versions of Qualcomm bootloaders expect these properties even
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when booting with a single DTB. The community is stuck with these
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bootloaders thus they require properties in the DTBs.
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Since several upstreamed Qualcomm SoC-based boards require these
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properties to properly boot and the properties are reportedly used by
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bootloaders, document them along with the bindings header with constants
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used by: bootloader, some DTS and socinfo driver.
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Link: https://lore.kernel.org/r/a3c932d1-a102-ce18-deea-18cbbd05ecab@linaro.org/
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Co-developed-by: Kumar Gala <galak@codeaurora.org>
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Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Reviewed-by: Rob Herring <robh@kernel.org>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20220830065744.161163-2-krzysztof.kozlowski@linaro.org
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---
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include/dt-bindings/arm/qcom,ids.h | 155 +++++++++++++++++++++++++++++
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1 file changed, 155 insertions(+)
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create mode 100644 include/dt-bindings/arm/qcom,ids.h
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--- /dev/null
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+++ b/include/dt-bindings/arm/qcom,ids.h
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@@ -0,0 +1,155 @@
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+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
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+/*
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+ * Copyright (c) 2015, The Linux Foundation. All rights reserved.
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+ * Copyright (c) 2022 Linaro Ltd
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+ * Author: Krzysztof Kozlowski <krzk@kernel.org> based on previous work of Kumar Gala.
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+ */
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+#ifndef _DT_BINDINGS_ARM_QCOM_IDS_H
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+#define _DT_BINDINGS_ARM_QCOM_IDS_H
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+
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+/*
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+ * The MSM chipset and hardware revision used by Qualcomm bootloaders, DTS for
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+ * older chipsets (qcom,msm-id) and in socinfo driver:
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+ */
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+#define QCOM_ID_MSM8960 87
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+#define QCOM_ID_APQ8064 109
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+#define QCOM_ID_MSM8660A 122
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+#define QCOM_ID_MSM8260A 123
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+#define QCOM_ID_APQ8060A 124
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+#define QCOM_ID_MSM8974 126
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+#define QCOM_ID_MPQ8064 130
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+#define QCOM_ID_MSM8960AB 138
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+#define QCOM_ID_APQ8060AB 139
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+#define QCOM_ID_MSM8260AB 140
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+#define QCOM_ID_MSM8660AB 141
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+#define QCOM_ID_MSM8626 145
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+#define QCOM_ID_MSM8610 147
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+#define QCOM_ID_APQ8064AB 153
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+#define QCOM_ID_MSM8226 158
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+#define QCOM_ID_MSM8526 159
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+#define QCOM_ID_MSM8110 161
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+#define QCOM_ID_MSM8210 162
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+#define QCOM_ID_MSM8810 163
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+#define QCOM_ID_MSM8212 164
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+#define QCOM_ID_MSM8612 165
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+#define QCOM_ID_MSM8112 166
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+#define QCOM_ID_MSM8225Q 168
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+#define QCOM_ID_MSM8625Q 169
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+#define QCOM_ID_MSM8125Q 170
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+#define QCOM_ID_APQ8064AA 172
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+#define QCOM_ID_APQ8084 178
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+#define QCOM_ID_APQ8074 184
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+#define QCOM_ID_MSM8274 185
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+#define QCOM_ID_MSM8674 186
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+#define QCOM_ID_MSM8974PRO_AC 194
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+#define QCOM_ID_MSM8126 198
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+#define QCOM_ID_APQ8026 199
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+#define QCOM_ID_MSM8926 200
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+#define QCOM_ID_MSM8326 205
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+#define QCOM_ID_MSM8916 206
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+#define QCOM_ID_MSM8994 207
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+#define QCOM_ID_APQ8074PRO_AA 208
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+#define QCOM_ID_APQ8074PRO_AB 209
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+#define QCOM_ID_APQ8074PRO_AC 210
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+#define QCOM_ID_MSM8274PRO_AA 211
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+#define QCOM_ID_MSM8274PRO_AB 212
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+#define QCOM_ID_MSM8274PRO_AC 213
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+#define QCOM_ID_MSM8674PRO_AA 214
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+#define QCOM_ID_MSM8674PRO_AB 215
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+#define QCOM_ID_MSM8674PRO_AC 216
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+#define QCOM_ID_MSM8974PRO_AA 217
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+#define QCOM_ID_MSM8974PRO_AB 218
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+#define QCOM_ID_APQ8028 219
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+#define QCOM_ID_MSM8128 220
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+#define QCOM_ID_MSM8228 221
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+#define QCOM_ID_MSM8528 222
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+#define QCOM_ID_MSM8628 223
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+#define QCOM_ID_MSM8928 224
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+#define QCOM_ID_MSM8510 225
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+#define QCOM_ID_MSM8512 226
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+#define QCOM_ID_MSM8936 233
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+#define QCOM_ID_MSM8939 239
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+#define QCOM_ID_APQ8036 240
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+#define QCOM_ID_APQ8039 241
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+#define QCOM_ID_MSM8996 246
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+#define QCOM_ID_APQ8016 247
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+#define QCOM_ID_MSM8216 248
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+#define QCOM_ID_MSM8116 249
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+#define QCOM_ID_MSM8616 250
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+#define QCOM_ID_MSM8992 251
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+#define QCOM_ID_APQ8094 253
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+#define QCOM_ID_MDM9607 290
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+#define QCOM_ID_APQ8096 291
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+#define QCOM_ID_MSM8998 292
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+#define QCOM_ID_MSM8953 293
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+#define QCOM_ID_MDM8207 296
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+#define QCOM_ID_MDM9207 297
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+#define QCOM_ID_MDM9307 298
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+#define QCOM_ID_MDM9628 299
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+#define QCOM_ID_APQ8053 304
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+#define QCOM_ID_MSM8996SG 305
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+#define QCOM_ID_MSM8996AU 310
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+#define QCOM_ID_APQ8096AU 311
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+#define QCOM_ID_APQ8096SG 312
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+#define QCOM_ID_SDM660 317
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+#define QCOM_ID_SDM630 318
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+#define QCOM_ID_APQ8098 319
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+#define QCOM_ID_SDM845 321
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+#define QCOM_ID_MDM9206 322
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+#define QCOM_ID_IPQ8074 323
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+#define QCOM_ID_SDA660 324
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+#define QCOM_ID_SDM658 325
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+#define QCOM_ID_SDA658 326
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+#define QCOM_ID_SDA630 327
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+#define QCOM_ID_SDM450 338
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+#define QCOM_ID_SDA845 341
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+#define QCOM_ID_IPQ8072 342
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+#define QCOM_ID_IPQ8076 343
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+#define QCOM_ID_IPQ8078 344
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+#define QCOM_ID_SDM636 345
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+#define QCOM_ID_SDA636 346
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+#define QCOM_ID_SDM632 349
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+#define QCOM_ID_SDA632 350
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+#define QCOM_ID_SDA450 351
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+#define QCOM_ID_SM8250 356
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+#define QCOM_ID_IPQ8070 375
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+#define QCOM_ID_IPQ8071 376
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+#define QCOM_ID_IPQ8072A 389
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+#define QCOM_ID_IPQ8074A 390
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+#define QCOM_ID_IPQ8076A 391
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+#define QCOM_ID_IPQ8078A 392
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+#define QCOM_ID_SM6125 394
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+#define QCOM_ID_IPQ8070A 395
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+#define QCOM_ID_IPQ8071A 396
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+#define QCOM_ID_IPQ6018 402
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+#define QCOM_ID_IPQ6028 403
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+#define QCOM_ID_IPQ6000 421
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+#define QCOM_ID_IPQ6010 422
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+#define QCOM_ID_SC7180 425
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+#define QCOM_ID_SM6350 434
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+#define QCOM_ID_SM8350 439
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+#define QCOM_ID_SC8280XP 449
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+#define QCOM_ID_IPQ6005 453
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+#define QCOM_ID_QRB5165 455
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+#define QCOM_ID_SM8450 457
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+#define QCOM_ID_SM7225 459
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+#define QCOM_ID_SA8295P 460
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+#define QCOM_ID_SA8540P 461
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+#define QCOM_ID_SM8450_2 480
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+#define QCOM_ID_SM8450_3 482
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+#define QCOM_ID_SC7280 487
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+#define QCOM_ID_SC7180P 495
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+#define QCOM_ID_SM6375 507
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+
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+/*
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+ * The board type and revision information, used by Qualcomm bootloaders and
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+ * DTS for older chipsets (qcom,board-id):
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+ */
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+#define QCOM_BOARD_ID(a, major, minor) \
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+ (((major & 0xff) << 16) | ((minor & 0xff) << 8) | QCOM_BOARD_ID_##a)
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+
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+#define QCOM_BOARD_ID_MTP 8
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+#define QCOM_BOARD_ID_DRAGONBOARD 10
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+#define QCOM_BOARD_ID_SBC 24
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+
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+#endif /* _DT_BINDINGS_ARM_QCOM_IDS_H */
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