mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 15:32:33 +00:00
f9c79947b5
Refreshed all patches. Compile-tested on: cns3xxx, imx6, x86_64 Runtime-tested on: cns3xxx, imx6, x86_64 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
213 lines
5.7 KiB
Diff
213 lines
5.7 KiB
Diff
--- a/arch/mips/ath25/Kconfig
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+++ b/arch/mips/ath25/Kconfig
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@@ -2,6 +2,7 @@
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config SOC_AR5312
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bool "Atheros AR5312/AR2312+ SoC support"
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depends on ATH25
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+ select GPIO_AR5312
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default y
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config SOC_AR2315
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--- a/arch/mips/ath25/ar5312.c
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+++ b/arch/mips/ath25/ar5312.c
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@@ -22,6 +22,7 @@
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#include <linux/platform_device.h>
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#include <linux/mtd/physmap.h>
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#include <linux/reboot.h>
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+#include <linux/gpio.h>
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#include <asm/bootinfo.h>
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#include <asm/reboot.h>
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#include <asm/time.h>
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@@ -180,6 +181,22 @@ static struct platform_device ar5312_phy
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.num_resources = 1,
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};
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+static struct resource ar5312_gpio_res[] = {
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+ {
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+ .name = "ar5312-gpio",
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+ .flags = IORESOURCE_MEM,
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+ .start = AR5312_GPIO_BASE,
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+ .end = AR5312_GPIO_BASE + AR5312_GPIO_SIZE - 1,
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+ },
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+};
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+
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+static struct platform_device ar5312_gpio = {
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+ .name = "ar5312-gpio",
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+ .id = -1,
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+ .resource = ar5312_gpio_res,
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+ .num_resources = ARRAY_SIZE(ar5312_gpio_res),
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+};
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+
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static void __init ar5312_flash_init(void)
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{
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void __iomem *flashctl_base;
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@@ -247,6 +264,8 @@ void __init ar5312_init_devices(void)
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platform_device_register(&ar5312_physmap_flash);
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+ platform_device_register(&ar5312_gpio);
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+
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switch (ath25_soc) {
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case ATH25_SOC_AR5312:
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if (!ath25_board.radio)
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--- a/drivers/gpio/Kconfig
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+++ b/drivers/gpio/Kconfig
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@@ -105,6 +105,13 @@ config GPIO_AMDPT
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driver for GPIO functionality on Promontory IOHub
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Require ACPI ASL code to enumerate as a platform device.
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+config GPIO_AR5312
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+ bool "AR5312 SoC GPIO support"
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+ default y if SOC_AR5312
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+ depends on SOC_AR5312
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+ help
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+ Say yes here to enable GPIO support for Atheros AR5312/AR2312+ SoCs.
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+
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config GPIO_ASPEED
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tristate "Aspeed GPIO support"
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depends on (ARCH_ASPEED || COMPILE_TEST) && OF_GPIO
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--- a/drivers/gpio/Makefile
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+++ b/drivers/gpio/Makefile
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@@ -29,6 +29,7 @@ obj-$(CONFIG_GPIO_ALTERA) += gpio-alte
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obj-$(CONFIG_GPIO_ALTERA_A10SR) += gpio-altera-a10sr.o
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obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o
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obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o
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+obj-$(CONFIG_GPIO_AR5312) += gpio-ar5312.o
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obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o
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obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
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obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o
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--- /dev/null
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+++ b/drivers/gpio/gpio-ar5312.c
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@@ -0,0 +1,121 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved.
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+ * Copyright (C) 2006 FON Technology, SL.
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+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
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+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@nbd.name>
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+ * Copyright (C) 2012 Alexandros C. Couloumbis <alex@ozo.com>
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/platform_device.h>
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+#include <linux/gpio.h>
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+
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+#define DRIVER_NAME "ar5312-gpio"
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+
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+#define AR5312_GPIO_DO 0x00 /* output register */
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+#define AR5312_GPIO_DI 0x04 /* intput register */
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+#define AR5312_GPIO_CR 0x08 /* control register */
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+
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+#define AR5312_GPIO_CR_M(x) (1 << (x)) /* mask for i/o */
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+#define AR5312_GPIO_CR_O(x) (0 << (x)) /* mask for output */
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+#define AR5312_GPIO_CR_I(x) (1 << (x)) /* mask for input */
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+#define AR5312_GPIO_CR_INT(x) (1 << ((x)+8)) /* mask for interrupt */
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+#define AR5312_GPIO_CR_UART(x) (1 << ((x)+16)) /* uart multiplex */
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+
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+#define AR5312_GPIO_NUM 8
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+
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+static void __iomem *ar5312_mem;
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+
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+static inline u32 ar5312_gpio_reg_read(unsigned reg)
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+{
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+ return __raw_readl(ar5312_mem + reg);
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+}
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+
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+static inline void ar5312_gpio_reg_write(unsigned reg, u32 val)
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+{
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+ __raw_writel(val, ar5312_mem + reg);
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+}
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+
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+static inline void ar5312_gpio_reg_mask(unsigned reg, u32 mask, u32 val)
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+{
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+ ar5312_gpio_reg_write(reg, (ar5312_gpio_reg_read(reg) & ~mask) | val);
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+}
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+
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+static int ar5312_gpio_get_val(struct gpio_chip *chip, unsigned gpio)
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+{
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+ return (ar5312_gpio_reg_read(AR5312_GPIO_DI) >> gpio) & 1;
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+}
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+
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+static void ar5312_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val)
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+{
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+ u32 reg = ar5312_gpio_reg_read(AR5312_GPIO_DO);
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+
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+ reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio);
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+ ar5312_gpio_reg_write(AR5312_GPIO_DO, reg);
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+}
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+
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+static int ar5312_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)
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+{
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+ ar5312_gpio_reg_mask(AR5312_GPIO_CR, 0, 1 << gpio);
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+ return 0;
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+}
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+
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+static int ar5312_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val)
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+{
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+ ar5312_gpio_reg_mask(AR5312_GPIO_CR, 1 << gpio, 0);
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+ ar5312_gpio_set_val(chip, gpio, val);
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+ return 0;
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+}
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+
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+static struct gpio_chip ar5312_gpio_chip = {
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+ .label = DRIVER_NAME,
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+ .direction_input = ar5312_gpio_dir_in,
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+ .direction_output = ar5312_gpio_dir_out,
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+ .set = ar5312_gpio_set_val,
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+ .get = ar5312_gpio_get_val,
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+ .base = 0,
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+ .ngpio = AR5312_GPIO_NUM,
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+};
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+
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+static int ar5312_gpio_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ struct resource *res;
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+ int ret;
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+
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+ if (ar5312_mem)
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+ return -EBUSY;
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ ar5312_mem = devm_ioremap_resource(dev, res);
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+ if (IS_ERR(ar5312_mem))
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+ return PTR_ERR(ar5312_mem);
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+
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+ ar5312_gpio_chip.parent = dev;
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+ ret = gpiochip_add(&ar5312_gpio_chip);
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+ if (ret) {
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+ dev_err(dev, "failed to add gpiochip\n");
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+ return ret;
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+ }
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+
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+ return 0;
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+}
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+
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+static struct platform_driver ar5312_gpio_driver = {
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+ .probe = ar5312_gpio_probe,
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+ .driver = {
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+ .name = DRIVER_NAME,
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+ .owner = THIS_MODULE,
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+ }
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+};
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+
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+static int __init ar5312_gpio_init(void)
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+{
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+ return platform_driver_register(&ar5312_gpio_driver);
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+}
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+subsys_initcall(ar5312_gpio_init);
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -175,6 +175,7 @@ config ATH25
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select CEVT_R4K
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select CSRC_R4K
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select DMA_NONCOHERENT
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+ select GPIOLIB
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select IRQ_MIPS_CPU
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select IRQ_DOMAIN
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select SYS_HAS_CPU_MIPS32_R1
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