mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 07:22:33 +00:00
111 lines
3.4 KiB
Diff
111 lines
3.4 KiB
Diff
--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
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+++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
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@@ -430,6 +430,17 @@ static void ath9k_regwrite_flush(void *h
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mutex_unlock(&priv->wmi->multi_write_mutex);
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}
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+static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
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+{
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+ u32 val;
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+
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+ val = ath9k_regread(hw_priv, reg_offset);
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+ val &= ~clr;
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+ val |= set;
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+ ath9k_regwrite(hw_priv, val, reg_offset);
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+ return val;
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+}
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+
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static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
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{
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*csz = L1_CACHE_BYTES >> 2;
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@@ -655,6 +666,7 @@ static int ath9k_init_priv(struct ath9k_
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ah->reg_ops.write = ath9k_regwrite;
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ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
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ah->reg_ops.write_flush = ath9k_regwrite_flush;
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+ ah->reg_ops.rmw = ath9k_reg_rmw;
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priv->ah = ah;
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common = ath9k_hw_common(ah);
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--- a/drivers/net/wireless/ath/ath.h
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+++ b/drivers/net/wireless/ath/ath.h
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@@ -119,6 +119,7 @@ struct ath_ops {
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void (*write)(void *, u32 val, u32 reg_offset);
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void (*enable_write_buffer)(void *);
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void (*write_flush) (void *);
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+ u32 (*rmw)(void *, u32 reg_offset, u32 set, u32 clr);
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};
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struct ath_common;
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--- a/drivers/net/wireless/ath/ath9k/init.c
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+++ b/drivers/net/wireless/ath/ath9k/init.c
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@@ -196,6 +196,28 @@ static unsigned int ath9k_ioread32(void
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return val;
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}
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+static unsigned int ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
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+{
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+ struct ath_hw *ah = (struct ath_hw *) hw_priv;
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+ struct ath_common *common = ath9k_hw_common(ah);
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+ struct ath_softc *sc = (struct ath_softc *) common->priv;
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+ unsigned long uninitialized_var(flags);
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+ u32 val;
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+
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+ if (ah->config.serialize_regmode == SER_REG_MODE_ON)
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+ spin_lock_irqsave(&sc->sc_serial_rw, flags);
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+
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+ val = ioread32(sc->mem + reg_offset);
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+ val &= ~clr;
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+ val |= set;
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+ iowrite32(val, sc->mem + reg_offset);
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+
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+ if (ah->config.serialize_regmode == SER_REG_MODE_ON)
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+ spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
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+
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+ return val;
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+}
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+
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/**************************/
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/* Initialization */
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/**************************/
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@@ -548,6 +570,7 @@ static int ath9k_init_softc(u16 devid, s
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ah->hw_version.subsysid = subsysid;
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ah->reg_ops.read = ath9k_ioread32;
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ah->reg_ops.write = ath9k_iowrite32;
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+ ah->reg_ops.rmw = ath9k_reg_rmw;
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sc->sc_ah = ah;
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if (!pdata) {
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--- a/drivers/net/wireless/ath/ath9k/hw.h
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+++ b/drivers/net/wireless/ath/ath9k/hw.h
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@@ -73,6 +73,9 @@
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#define REG_READ_MULTI(_ah, _addr, _val, _cnt) \
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(_ah)->reg_ops.multi_read((_ah), (_addr), (_val), (_cnt))
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+#define REG_RMW(_ah, _reg, _set, _clr) \
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+ (_ah)->reg_ops.rmw((_ah), (_reg), (_set), (_clr))
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+
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#define ENABLE_REGWRITE_BUFFER(_ah) \
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do { \
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if ((_ah)->reg_ops.enable_write_buffer) \
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@@ -87,17 +90,14 @@
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#define SM(_v, _f) (((_v) << _f##_S) & _f)
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#define MS(_v, _f) (((_v) & _f) >> _f##_S)
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-#define REG_RMW(_a, _r, _set, _clr) \
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- REG_WRITE(_a, _r, (REG_READ(_a, _r) & ~(_clr)) | (_set))
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#define REG_RMW_FIELD(_a, _r, _f, _v) \
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- REG_WRITE(_a, _r, \
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- (REG_READ(_a, _r) & ~_f) | (((_v) << _f##_S) & _f))
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+ REG_RMW(_a, _r, (((_v) << _f##_S) & _f), (_f))
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#define REG_READ_FIELD(_a, _r, _f) \
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(((REG_READ(_a, _r) & _f) >> _f##_S))
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#define REG_SET_BIT(_a, _r, _f) \
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- REG_WRITE(_a, _r, REG_READ(_a, _r) | (_f))
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+ REG_RMW(_a, _r, (_f), 0)
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#define REG_CLR_BIT(_a, _r, _f) \
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- REG_WRITE(_a, _r, REG_READ(_a, _r) & ~(_f))
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+ REG_RMW(_a, _r, 0, (_f))
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#define DO_DELAY(x) do { \
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if (((++(x) % 64) == 0) && \
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