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Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.82 All patches automatically rebased. Build system: x86/64 Build-tested: x86/64/AMD Cezanne, ramips/tplink_archer-a6-v3 Run-tested: x86/64/AMD Cezanne, ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me>
97 lines
3.5 KiB
Diff
97 lines
3.5 KiB
Diff
From ba09ce751542f6f80019433364d46a14ade59dd0 Mon Sep 17 00:00:00 2001
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From: Jonathan Bell <jonathan@raspberrypi.com>
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Date: Wed, 16 Feb 2022 14:31:02 +0000
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Subject: [PATCH] usb: xhci: add a quirk for Superspeed bulk OUT
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transfers on VL805
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The VL805 has a bug in its internal FIFO space accounting that results
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in bulk OUT babble if a TRB in a large multi-element TD has a data
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buffer size that is larger than and not a multiple of wMaxPacketSize for
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the endpoint. If the downstream USB3.0 link is congested, or latency is
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increased through an intermediate hub, then the VL805 enters a suspected
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FIFO overflow condition and transmits repeated, garbled data to the
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endpoint.
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TDs with TRBs of exact multiples of wMaxPacketSize and smaller than
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wMaxPacketSize appear to be handled correctly, so split buffers at a
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1024-byte length boundary and put the remainder in a separate smaller
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TRB.
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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---
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drivers/usb/host/xhci-pci.c | 1 +
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drivers/usb/host/xhci-ring.c | 21 +++++++++++++++++++--
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drivers/usb/host/xhci.h | 1 +
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3 files changed, 21 insertions(+), 2 deletions(-)
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--- a/drivers/usb/host/xhci-pci.c
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+++ b/drivers/usb/host/xhci-pci.c
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@@ -297,6 +297,7 @@ static void xhci_pci_quirks(struct devic
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xhci->quirks |= XHCI_LPM_SUPPORT;
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xhci->quirks |= XHCI_AVOID_DQ_ON_LINK;
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xhci->quirks |= XHCI_VLI_TRB_CACHE_BUG;
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+ xhci->quirks |= XHCI_VLI_SS_BULK_OUT_BUG;
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}
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if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
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--- a/drivers/usb/host/xhci-ring.c
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+++ b/drivers/usb/host/xhci-ring.c
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@@ -3605,14 +3605,15 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
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unsigned int num_trbs;
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unsigned int start_cycle, num_sgs = 0;
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unsigned int enqd_len, block_len, trb_buff_len, full_len;
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- int sent_len, ret;
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- u32 field, length_field, remainder;
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+ int sent_len, ret, vli_quirk = 0;
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+ u32 field, length_field, remainder, maxpacket;
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u64 addr, send_addr;
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ring = xhci_urb_to_transfer_ring(xhci, urb);
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if (!ring)
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return -EINVAL;
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+ maxpacket = usb_endpoint_maxp(&urb->ep->desc);
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full_len = urb->transfer_buffer_length;
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/* If we have scatter/gather list, we use it. */
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if (urb->num_sgs && !(urb->transfer_flags & URB_DMA_MAP_SINGLE)) {
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@@ -3649,6 +3650,17 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
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start_cycle = ring->cycle_state;
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send_addr = addr;
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+ if (xhci->quirks & XHCI_VLI_SS_BULK_OUT_BUG &&
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+ !usb_urb_dir_in(urb) && urb->dev->speed >= USB_SPEED_SUPER) {
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+ /*
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+ * VL805 - superspeed bulk OUT traffic can cause
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+ * an internal fifo overflow if the TRB buffer is larger
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+ * than wMaxPacket and the length is not an integer
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+ * multiple of wMaxPacket.
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+ */
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+ vli_quirk = 1;
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+ }
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+
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/* Queue the TRBs, even if they are zero-length */
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for (enqd_len = 0; first_trb || enqd_len < full_len;
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enqd_len += trb_buff_len) {
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@@ -3661,6 +3673,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd *
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if (enqd_len + trb_buff_len > full_len)
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trb_buff_len = full_len - enqd_len;
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+ if (vli_quirk && trb_buff_len > maxpacket) {
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+ /* SS bulk wMaxPacket is 1024B */
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+ remainder = trb_buff_len & (maxpacket - 1);
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+ trb_buff_len -= remainder;
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+ }
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/* Don't change the cycle bit of the first TRB until later */
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if (first_trb) {
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first_trb = false;
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--- a/drivers/usb/host/xhci.h
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+++ b/drivers/usb/host/xhci.h
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@@ -1905,6 +1905,7 @@ struct xhci_hcd {
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#define XHCI_ZHAOXIN_HOST BIT_ULL(46)
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#define XHCI_AVOID_DQ_ON_LINK BIT_ULL(47)
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#define XHCI_VLI_TRB_CACHE_BUG BIT_ULL(48)
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+#define XHCI_VLI_SS_BULK_OUT_BUG BIT_ULL(49)
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unsigned int num_active_eps;
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unsigned int limit_active_eps;
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