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3b1e99d23e
- add fxos8700 support to GW52xx/GW53xx/GW54xx - add USB_OTG support to GW552x - add LSM9DS1 IMU support to GW560x - add LSM9DS1 IMU support to GW5904 - add CC1352 UART to GW5910 - add BCM4330 support to GW5910 - fix wlan regulator for GW5910 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
82 lines
1.9 KiB
Diff
82 lines
1.9 KiB
Diff
From 9e72702a3d9a967edac02d8e937bce2b68b77814 Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Tue, 12 May 2020 13:59:37 -0700
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Subject: [PATCH 05/20] ARM: dts: imx6qdl-gw560x: add lsm9ds1 iio imu/magn
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support
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Add one node for the accel/gyro i2c device and another for the separate
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magnetometer device in the lsm9ds1.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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---
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arch/arm/boot/dts/imx6qdl-gw560x.dtsi | 31 +++++++++++++++++++++++++++++++
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1 file changed, 31 insertions(+)
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diff --git a/arch/arm/boot/dts/imx6qdl-gw560x.dtsi b/arch/arm/boot/dts/imx6qdl-gw560x.dtsi
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index e8e36df..69ca70d 100644
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--- a/arch/arm/boot/dts/imx6qdl-gw560x.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl-gw560x.dtsi
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@@ -295,6 +295,15 @@
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VDDIO-supply = <®_3p3v>;
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};
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+ magn@1c {
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+ compatible = "st,lsm9ds1-magn";
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+ reg = <0x1c>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_mag>;
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+ interrupt-parent = <&gpio5>;
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+ interrupts = <9 IRQ_TYPE_EDGE_RISING>;
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+ };
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+
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tca8418: keypad@34 {
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compatible = "ti,tca8418";
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pinctrl-names = "default";
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@@ -389,6 +398,16 @@
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};
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};
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};
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+
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+ imu@6a {
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+ compatible = "st,lsm9ds1-imu";
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+ reg = <0x6a>;
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+ st,drdy-int-pin = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pinctrl_imu>;
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+ interrupt-parent = <&gpio5>;
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+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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};
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&i2c3 {
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@@ -609,6 +628,12 @@
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>;
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};
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+ pinctrl_imu: imugrp {
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+ fsl,pins = <
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+ MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x1b0b0
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+ >;
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+ };
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+
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pinctrl_keypad: keypadgrp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0001b0b0 /* KEYPAD_IRQ# */
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@@ -616,6 +641,12 @@
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>;
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};
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+ pinctrl_mag: maggrp {
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+ fsl,pins = <
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+ MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b0
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+ >;
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+ };
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+
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pinctrl_pcie: pciegrp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0 /* PCI_RST# */
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--
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2.7.4
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