mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 06:33:41 +00:00
8a9273d51e
Copy backport, hack, pending patch and config from 6.1 to 6.6. Signed-off-by: Weijie Gao <hackpascal@gmail.com>
115 lines
3.8 KiB
Diff
115 lines
3.8 KiB
Diff
From 21a2802a8365cfa82cc02187c1f95136d85592ad Mon Sep 17 00:00:00 2001
|
|
From: Christian Marangi <ansuelsmth@gmail.com>
|
|
Date: Fri, 8 Dec 2023 15:51:59 +0100
|
|
Subject: [PATCH 12/13] net: phy: at803x: move at8035 specific DT parse to
|
|
dedicated probe
|
|
|
|
Move at8035 specific DT parse for clock out frequency to dedicated probe
|
|
to make at803x probe function more generic.
|
|
|
|
This is to tidy code and no behaviour change are intended.
|
|
|
|
Detection logic is changed, we check if the clk 25m mask is set and if
|
|
it's not zero, we assume the qca,clk-out-frequency property is set.
|
|
|
|
The property is checked in the generic at803x_parse_dt called by
|
|
at803x_probe.
|
|
|
|
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
|
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|
|
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
---
|
|
drivers/net/phy/at803x.c | 60 +++++++++++++++++++++++++++-------------
|
|
1 file changed, 41 insertions(+), 19 deletions(-)
|
|
|
|
--- a/drivers/net/phy/at803x.c
|
|
+++ b/drivers/net/phy/at803x.c
|
|
@@ -638,23 +638,6 @@ static int at803x_parse_dt(struct phy_de
|
|
|
|
priv->clk_25m_reg |= FIELD_PREP(AT803X_CLK_OUT_MASK, sel);
|
|
priv->clk_25m_mask |= AT803X_CLK_OUT_MASK;
|
|
-
|
|
- /* Fixup for the AR8030/AR8035. This chip has another mask and
|
|
- * doesn't support the DSP reference. Eg. the lowest bit of the
|
|
- * mask. The upper two bits select the same frequencies. Mask
|
|
- * the lowest bit here.
|
|
- *
|
|
- * Warning:
|
|
- * There was no datasheet for the AR8030 available so this is
|
|
- * just a guess. But the AR8035 is listed as pin compatible
|
|
- * to the AR8030 so there might be a good chance it works on
|
|
- * the AR8030 too.
|
|
- */
|
|
- if (phydev->drv->phy_id == ATH8030_PHY_ID ||
|
|
- phydev->drv->phy_id == ATH8035_PHY_ID) {
|
|
- priv->clk_25m_reg &= AT8035_CLK_OUT_MASK;
|
|
- priv->clk_25m_mask &= AT8035_CLK_OUT_MASK;
|
|
- }
|
|
}
|
|
|
|
ret = of_property_read_u32(node, "qca,clk-out-strength", &strength);
|
|
@@ -1635,6 +1618,45 @@ static int at8031_config_intr(struct phy
|
|
return at803x_config_intr(phydev);
|
|
}
|
|
|
|
+static int at8035_parse_dt(struct phy_device *phydev)
|
|
+{
|
|
+ struct at803x_priv *priv = phydev->priv;
|
|
+
|
|
+ /* Mask is set by the generic at803x_parse_dt
|
|
+ * if property is set. Assume property is set
|
|
+ * with the mask not zero.
|
|
+ */
|
|
+ if (priv->clk_25m_mask) {
|
|
+ /* Fixup for the AR8030/AR8035. This chip has another mask and
|
|
+ * doesn't support the DSP reference. Eg. the lowest bit of the
|
|
+ * mask. The upper two bits select the same frequencies. Mask
|
|
+ * the lowest bit here.
|
|
+ *
|
|
+ * Warning:
|
|
+ * There was no datasheet for the AR8030 available so this is
|
|
+ * just a guess. But the AR8035 is listed as pin compatible
|
|
+ * to the AR8030 so there might be a good chance it works on
|
|
+ * the AR8030 too.
|
|
+ */
|
|
+ priv->clk_25m_reg &= AT8035_CLK_OUT_MASK;
|
|
+ priv->clk_25m_mask &= AT8035_CLK_OUT_MASK;
|
|
+ }
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+/* AR8030 and AR8035 shared the same special mask for clk_25m */
|
|
+static int at8035_probe(struct phy_device *phydev)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ ret = at803x_probe(phydev);
|
|
+ if (ret)
|
|
+ return ret;
|
|
+
|
|
+ return at8035_parse_dt(phydev);
|
|
+}
|
|
+
|
|
static int qca83xx_config_init(struct phy_device *phydev)
|
|
{
|
|
u8 switch_revision;
|
|
@@ -2107,7 +2129,7 @@ static struct phy_driver at803x_driver[]
|
|
PHY_ID_MATCH_EXACT(ATH8035_PHY_ID),
|
|
.name = "Qualcomm Atheros AR8035",
|
|
.flags = PHY_POLL_CABLE_TEST,
|
|
- .probe = at803x_probe,
|
|
+ .probe = at8035_probe,
|
|
.config_aneg = at803x_config_aneg,
|
|
.config_init = at803x_config_init,
|
|
.soft_reset = genphy_soft_reset,
|
|
@@ -2128,7 +2150,7 @@ static struct phy_driver at803x_driver[]
|
|
.phy_id = ATH8030_PHY_ID,
|
|
.name = "Qualcomm Atheros AR8030",
|
|
.phy_id_mask = AT8030_PHY_ID_MASK,
|
|
- .probe = at803x_probe,
|
|
+ .probe = at8035_probe,
|
|
.config_init = at803x_config_init,
|
|
.link_change_notify = at803x_link_change_notify,
|
|
.set_wol = at803x_set_wol,
|