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6bbb75dfdc
bmips has all the dt-bindings includes inside each SoC .dtsi files, so let's move the new includes there instead of adding them to each board .dts files. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
221 lines
3.3 KiB
Plaintext
221 lines
3.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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#include "bcm6328.dtsi"
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/ {
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model = "Comtrend AR-5387un";
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compatible = "comtrend,ar-5387un", "brcm,bcm6328";
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aliases {
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led-boot = &led_power_green;
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led-failsafe = &led_power_red;
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led-running = &led_power_green;
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led-upgrade = &led_power_green;
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <100>;
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reset {
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label = "reset";
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gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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debounce-interval = <60>;
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};
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};
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bcm43225-sprom {
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compatible = "brcm,bcma-sprom";
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pci-bus = <1>;
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pci-dev = <0>;
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nvmem-cells = <&macaddr_cfe_6a0 1>;
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nvmem-cell-names = "mac-address";
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brcm,sprom = "brcm/bcm43225-sprom.bin";
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brcm,sprom-fixups = <2 0x05bb>,
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<65 0x1204>,
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<78 0x0303>,
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<79 0x0202>,
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<80 0xff02>,
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<87 0x0315>,
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<88 0x0315>,
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<96 0x2048>,
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<97 0xff11>,
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<98 0x1567>,
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<99 0xfb24>,
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<100 0x3e3c>,
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<101 0x4038>,
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<102 0xfe7f>,
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<103 0x1279>,
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<112 0x2048>,
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<113 0xff03>,
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<114 0x154c>,
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<115 0xfb27>,
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<116 0x3e3c>,
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<117 0x4038>,
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<118 0xfe87>,
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<119 0x1233>,
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<203 0x2226>;
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};
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};
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&ehci {
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status = "okay";
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};
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ðernet {
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status = "okay";
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nvmem-cells = <&macaddr_cfe_6a0 0>;
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nvmem-cell-names = "mac-address";
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};
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&hsspi {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <16666667>;
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spi-tx-bus-width = <2>;
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spi-rx-bus-width = <2>;
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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reg = <0x000000 0x010000>;
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label = "cfe";
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_cfe_6a0: macaddr@6a0 {
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compatible = "mac-base";
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reg = <0x6a0 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@10000 {
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compatible = "brcm,bcm963xx-imagetag";
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reg = <0x010000 0xfe0000>;
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label = "firmware";
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};
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partition@ff0000 {
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reg = <0xff0000 0x010000>;
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label = "nvram";
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};
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};
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};
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};
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&leds {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_leds>;
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led@1 {
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reg = <1>;
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label = "red:internet";
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};
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led_power_red: led@4 {
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reg = <4>;
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_RED>;
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panic-indicator;
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};
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led@7 {
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reg = <7>;
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label = "green:internet";
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};
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led_power_green: led@8 {
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reg = <8>;
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_GREEN>;
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};
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led@11 {
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reg = <11>;
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active-low;
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label = "green:dsl";
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};
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};
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&ohci {
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status = "okay";
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};
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&pcie {
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status = "okay";
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};
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&pinctrl {
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pinctrl_leds: leds {
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function = "led";
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pins = "gpio1", "gpio4", "gpio7",
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"gpio8", "gpio11";
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};
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};
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&switch0 {
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ports {
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port@0 {
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reg = <0>;
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label = "lan1";
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phy-handle = <&phy1>;
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phy-mode = "mii";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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phy-handle = <&phy2>;
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phy-mode = "mii";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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phy-handle = <&phy3>;
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phy-mode = "mii";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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phy-handle = <&phy4>;
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phy-mode = "mii";
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&usbh {
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status = "okay";
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};
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