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e4ce3109f2
The node pinctrl0 is already set up in the SOC DTSI files, but defined again as member of pinctrl in most of the device DTS(I) files. This patch removes this redundancy for the entire ramips target. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
146 lines
2.3 KiB
Plaintext
146 lines
2.3 KiB
Plaintext
/dts-v1/;
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "lenovo,newifi-d1", "mediatek,mt7621-soc";
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model = "Newifi-D1";
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aliases {
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led-boot = &led_blue;
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led-failsafe = &led_blue;
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led-running = &led_blue;
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led-upgrade = &led_blue;
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label-mac-device = ðernet;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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leds {
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compatible = "gpio-leds";
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status-red {
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label = "newifi-d1:red:status";
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gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
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};
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status-green {
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label = "newifi-d1:green:status";
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gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
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};
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led_blue: status-blue {
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label = "newifi-d1:blue:status";
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gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio_export {
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compatible = "gpio-export";
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#size-cells = <0>;
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usb2power {
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gpio-export,name = "usb2power";
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gpio-export,output = <1>;
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gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
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};
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usb3power {
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gpio-export,name = "usb3power";
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gpio-export,output = <1>;
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gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&sdhci {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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compatible = "mx25l25635f", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0x1fb0000>;
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};
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&pcie1 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0000>;
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};
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};
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ðernet {
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mtd-mac-address = <&factory 0xe000>;
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};
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&state_default {
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gpio {
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ralink,group = "wdt", "rgmii2", "jtag", "uart2", "uart3", "i2c";
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ralink,function = "gpio";
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};
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};
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