openwrt/target/linux/ath79/dts/ar7242_tplink_tl-wr2543-v1.dts
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7242.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "tplink,tl-wr2543-v1", "qca,ar7242";
model = "TP-Link TL-WR2543N/ND";
aliases {
led-boot = &led_wps;
led-failsafe = &led_wps;
led-running = &led_wps;
led-upgrade = &led_wps;
label-mac-device = &eth0;
};
chosen {
bootargs = "console=ttyS0,115200n8";
};
extosc: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <40000000>;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
led_wps: wps {
label = "green:wps";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
};
usb {
label = "green:usb";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port>;
linux,default-trigger = "usbport";
};
};
ath9k-leds {
compatible = "gpio-leds";
wlan2g {
label = "green:wlan2g";
gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wlan5g {
label = "green:wlan5g";
gpios = <&ath9k 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
rtl8367 {
compatible = "realtek,rtl8367";
gpio-sda = <&gpio 1 GPIO_ACTIVE_HIGH>;
gpio-sck = <&gpio 6 GPIO_ACTIVE_HIGH>;
realtek,extif0 = <1 0 1 1 1 1 1 1 2>;
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
};
&pll {
clocks = <&extosc>;
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x020000 0x7d0000>;
};
partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&usb {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
hub_port: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&usb_phy {
status = "okay";
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
reg = <0x0000 0 0 0 0>;
#gpio-cells = <2>;
gpio-controller;
qca,no-eeprom;
mtd-mac-address = <&uboot 0x1fc00>;
};
};
&eth0 {
status = "okay";
phy-mode = "rgmii";
mtd-mac-address = <&uboot 0x1fc00>;
phy-handle = <&phy0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};