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b754b0c721
Removed upstreamed: backport-5.10/850-v5.17-0004-PCI-aardvark-Clear-all-MSIs-at-setup.patch pending-5.10/850-0002-PCI-aardvark-Fix-reading-MSI-interrupt-number.patch All other patches automatically rebased. Build system: x86_64 Build-tested: bcm2711/RPi4B Signed-off-by: John Audia <therealgraysky@proton.me>
121 lines
3.9 KiB
Diff
121 lines
3.9 KiB
Diff
From 40b5d2f15c091fa9c854acde91ad2acb504027d7 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
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Date: Mon, 12 Apr 2021 08:50:31 +0200
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Subject: [PATCH] net: dsa: mt7530: Add support for EEE features
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This patch adds EEE support.
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Signed-off-by: René van Dorst <opensource@vdorst.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/dsa/mt7530.c | 43 ++++++++++++++++++++++++++++++++++++++++
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drivers/net/dsa/mt7530.h | 14 ++++++++++++-
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2 files changed, 56 insertions(+), 1 deletion(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -2372,6 +2372,17 @@ static void mt753x_phylink_mac_link_up(s
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mcr |= PMCR_RX_FC_EN;
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}
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+ if (mode == MLO_AN_PHY && phydev && phy_init_eee(phydev, 0) >= 0) {
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+ switch (speed) {
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+ case SPEED_1000:
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+ mcr |= PMCR_FORCE_EEE1G;
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+ break;
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+ case SPEED_100:
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+ mcr |= PMCR_FORCE_EEE100;
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+ break;
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+ }
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+ }
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+
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mt7530_set(priv, MT7530_PMCR_P(port), mcr);
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}
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@@ -2602,6 +2613,36 @@ mt753x_phy_write(struct dsa_switch *ds,
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return priv->info->phy_write(ds, port, regnum, val);
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}
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+static int mt753x_get_mac_eee(struct dsa_switch *ds, int port,
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+ struct ethtool_eee *e)
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+{
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+ struct mt7530_priv *priv = ds->priv;
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+ u32 eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
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+
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+ e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN);
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+ e->tx_lpi_timer = GET_LPI_THRESH(eeecr);
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+
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+ return 0;
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+}
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+
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+static int mt753x_set_mac_eee(struct dsa_switch *ds, int port,
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+ struct ethtool_eee *e)
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+{
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+ struct mt7530_priv *priv = ds->priv;
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+ u32 set, mask = LPI_THRESH_MASK | LPI_MODE_EN;
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+
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+ if (e->tx_lpi_timer > 0xFFF)
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+ return -EINVAL;
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+
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+ set = SET_LPI_THRESH(e->tx_lpi_timer);
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+ if (!e->tx_lpi_enabled)
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+ /* Force LPI Mode without a delay */
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+ set |= LPI_MODE_EN;
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+ mt7530_rmw(priv, MT7530_PMEEECR_P(port), mask, set);
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+
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+ return 0;
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+}
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+
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static const struct dsa_switch_ops mt7530_switch_ops = {
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.get_tag_protocol = mtk_get_tag_protocol,
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.setup = mt753x_setup,
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@@ -2630,6 +2671,8 @@ static const struct dsa_switch_ops mt753
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.phylink_mac_an_restart = mt753x_phylink_mac_an_restart,
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.phylink_mac_link_down = mt753x_phylink_mac_link_down,
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.phylink_mac_link_up = mt753x_phylink_mac_link_up,
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+ .get_mac_eee = mt753x_get_mac_eee,
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+ .set_mac_eee = mt753x_set_mac_eee,
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};
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static const struct mt753x_info mt753x_table[] = {
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--- a/drivers/net/dsa/mt7530.h
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+++ b/drivers/net/dsa/mt7530.h
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@@ -240,6 +240,8 @@ enum mt7530_vlan_port_attr {
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#define PMCR_RX_EN BIT(13)
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#define PMCR_BACKOFF_EN BIT(9)
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#define PMCR_BACKPR_EN BIT(8)
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+#define PMCR_FORCE_EEE1G BIT(7)
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+#define PMCR_FORCE_EEE100 BIT(6)
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#define PMCR_TX_FC_EN BIT(5)
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#define PMCR_RX_FC_EN BIT(4)
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#define PMCR_FORCE_SPEED_1000 BIT(3)
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@@ -264,7 +266,8 @@ enum mt7530_vlan_port_attr {
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#define PMCR_LINK_SETTINGS_MASK (PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \
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PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \
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PMCR_TX_FC_EN | PMCR_RX_FC_EN | \
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- PMCR_FORCE_FDX | PMCR_FORCE_LNK)
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+ PMCR_FORCE_FDX | PMCR_FORCE_LNK | \
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+ PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100)
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#define PMCR_CPU_PORT_SETTING(id) (PMCR_FORCE_MODE_ID((id)) | \
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PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \
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PMCR_BACKOFF_EN | PMCR_BACKPR_EN | \
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@@ -273,6 +276,15 @@ enum mt7530_vlan_port_attr {
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PMCR_FORCE_SPEED_1000 | \
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PMCR_FORCE_FDX | PMCR_FORCE_LNK)
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+#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100)
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+#define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24)
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+#define WAKEUP_TIME_100(x) (((x) & 0xFF) << 16)
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+#define LPI_THRESH_MASK GENMASK(15, 4)
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+#define LPI_THRESH_SHT 4
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+#define SET_LPI_THRESH(x) (((x) << LPI_THRESH_SHT) & LPI_THRESH_MASK)
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+#define GET_LPI_THRESH(x) (((x) & LPI_THRESH_MASK) >> LPI_THRESH_SHT)
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+#define LPI_MODE_EN BIT(0)
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+
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#define MT7530_PMSR_P(x) (0x3008 + (x) * 0x100)
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#define PMSR_EEE1G BIT(7)
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#define PMSR_EEE100M BIT(6)
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