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084a8a2faf
Compile-tested: x86/64 Run-tested: x86/64 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
153 lines
3.9 KiB
Diff
153 lines
3.9 KiB
Diff
From 68e332146b6f0a1d2a4514810986a7cf3c3117e3 Mon Sep 17 00:00:00 2001
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From: Pankaj Bansal <pankaj.bansal@nxp.com>
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Date: Thu, 28 Feb 2019 17:22:28 +0530
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Subject: [PATCH] drivers: soc: fsl: add qixis driver
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FPGA on LX2160AQDS/LX2160ARDB connected on I2C bus, so add qixis driver
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which is basically an i2c client driver to control FPGA.
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Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
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---
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drivers/soc/fsl/Kconfig | 11 +++++
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drivers/soc/fsl/Makefile | 1 +
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drivers/soc/fsl/qixis_ctrl.c | 105 +++++++++++++++++++++++++++++++++++++++++++
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3 files changed, 117 insertions(+)
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create mode 100644 drivers/soc/fsl/qixis_ctrl.c
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--- a/drivers/soc/fsl/Kconfig
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+++ b/drivers/soc/fsl/Kconfig
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@@ -41,4 +41,15 @@ config DPAA2_CONSOLE
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/dev/dpaa2_mc_console and /dev/dpaa2_aiop_console,
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which can be used to dump the Management Complex and AIOP
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firmware logs.
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+
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+config FSL_QIXIS
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+ tristate "QIXIS system controller driver"
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+ depends on OF
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+ select REGMAP_I2C
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+ select REGMAP_MMIO
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+ default n
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+ help
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+ Say y here to enable QIXIS system controller api. The qixis driver
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+ provides FPGA functions to control system.
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+
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endmenu
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--- a/drivers/soc/fsl/Makefile
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+++ b/drivers/soc/fsl/Makefile
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@@ -6,6 +6,7 @@
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obj-$(CONFIG_FSL_DPAA) += qbman/
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obj-$(CONFIG_QUICC_ENGINE) += qe/
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obj-$(CONFIG_CPM) += qe/
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+obj-$(CONFIG_FSL_QIXIS) += qixis_ctrl.o
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obj-$(CONFIG_FSL_GUTS) += guts.o
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obj-$(CONFIG_FSL_MC_DPIO) += dpio/
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obj-$(CONFIG_DPAA2_CONSOLE) += dpaa2-console.o
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--- /dev/null
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+++ b/drivers/soc/fsl/qixis_ctrl.c
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@@ -0,0 +1,105 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+
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+/* Freescale QIXIS system controller driver.
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+ *
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+ * Copyright 2015 Freescale Semiconductor, Inc.
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+ * Copyright 2018-2019 NXP
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+ */
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+
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+#include <linux/err.h>
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+#include <linux/i2c.h>
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+#include <linux/module.h>
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+#include <linux/mfd/core.h>
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+#include <linux/of.h>
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+#include <linux/regmap.h>
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+
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+/* QIXIS MAP */
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+struct fsl_qixis_regs {
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+ u8 id; /* Identification Registers */
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+ u8 version; /* Version Register */
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+ u8 qixis_ver; /* QIXIS Version Register */
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+ u8 reserved1[0x1f];
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+};
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+
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+struct qixis_priv {
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+ struct regmap *regmap;
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+};
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+
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+static struct regmap_config qixis_regmap_config = {
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+ .reg_bits = 8,
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+ .val_bits = 8,
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+};
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+
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+static const struct mfd_cell fsl_qixis_devs[] = {
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+ {
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+ .name = "reg-mux",
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+ .of_compatible = "reg-mux",
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+ },
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+};
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+
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+static int fsl_qixis_i2c_probe(struct i2c_client *client)
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+{
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+ struct qixis_priv *priv;
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+ int ret = 0;
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+ u32 qver;
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+
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+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
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+ return -EOPNOTSUPP;
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+
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+ priv = devm_kzalloc(&client->dev, sizeof(struct qixis_priv),
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+ GFP_KERNEL);
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+ if (!priv)
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+ return -ENOMEM;
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+
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+ priv->regmap = regmap_init_i2c(client, &qixis_regmap_config);
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+ regmap_read(priv->regmap, offsetof(struct fsl_qixis_regs, qixis_ver),
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+ &qver);
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+ pr_info("Freescale QIXIS Version: 0x%08x\n", qver);
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+
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+ i2c_set_clientdata(client, priv);
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+
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+ if (of_device_is_compatible(client->dev.of_node, "simple-mfd"))
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+ ret = devm_mfd_add_devices(&client->dev, -1, fsl_qixis_devs,
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+ ARRAY_SIZE(fsl_qixis_devs), NULL, 0,
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+ NULL);
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+ if (ret)
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+ goto error;
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+
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+ return ret;
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+error:
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+ regmap_exit(priv->regmap);
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+
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+ return ret;
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+}
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+
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+static int fsl_qixis_i2c_remove(struct i2c_client *client)
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+{
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+ struct qixis_priv *priv;
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+
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+ priv = i2c_get_clientdata(client);
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+ regmap_exit(priv->regmap);
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+
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+ return 0;
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+}
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+
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+static const struct of_device_id fsl_qixis_i2c_of_match[] = {
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+ { .compatible = "fsl,fpga-qixis-i2c" },
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+ {}
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+};
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+MODULE_DEVICE_TABLE(of, fsl_qixis_i2c_of_match);
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+
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+static struct i2c_driver fsl_qixis_i2c_driver = {
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+ .driver = {
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+ .name = "qixis_ctrl_i2c",
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+ .owner = THIS_MODULE,
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+ .of_match_table = of_match_ptr(fsl_qixis_i2c_of_match),
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+ },
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+ .probe_new = fsl_qixis_i2c_probe,
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+ .remove = fsl_qixis_i2c_remove,
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+};
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+module_i2c_driver(fsl_qixis_i2c_driver);
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+
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+MODULE_AUTHOR("Wang Dongsheng <dongsheng.wang@freescale.com>");
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+MODULE_DESCRIPTION("Freescale QIXIS system controller driver");
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+MODULE_LICENSE("GPL");
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+
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