mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-25 16:31:13 +00:00
e44e60b290
Resolved merge conflict in the following patches: layerscape: 701-net-0213-dpaa2-eth-Add-CEETM-qdisc-support.patch ramips: 0013-owrt-hack-fix-mt7688-cache-issue.patch Refreshed patches, removed upstreamed patch: bcm63xx: 020-v5.8-mtd-rawnand-brcmnand-fix-hamming-oob-layout.patch Run tested: qemu-x86-64 Build tested: x86/64 Signed-off-by: Petr Štetiar <ynezz@true.cz>
60 lines
1.8 KiB
Diff
60 lines
1.8 KiB
Diff
From d0ff7a1bcfe886cab1a237895b08ac51ecfe10e7 Mon Sep 17 00:00:00 2001
|
|
From: Tim Harvey <tharvey@gateworks.com>
|
|
Date: Wed, 10 Apr 2019 08:00:47 -0700
|
|
Subject: [PATCH 04/12] PCI: add quirk for Gateworks PLX PEX860x switch with
|
|
GPIO PERST#
|
|
|
|
Gateworks boards use PLX PEX860x switches where downstream ports
|
|
have their PERST# driven from the PEX GPIO.
|
|
|
|
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
|
|
---
|
|
drivers/pci/quirks.c | 32 ++++++++++++++++++++++++++++++++
|
|
1 file changed, 32 insertions(+)
|
|
|
|
--- a/drivers/pci/quirks.c
|
|
+++ b/drivers/pci/quirks.c
|
|
@@ -25,6 +25,7 @@
|
|
#include <linux/ktime.h>
|
|
#include <linux/mm.h>
|
|
#include <linux/nvme.h>
|
|
+#include <linux/of.h>
|
|
#include <linux/platform_data/x86/apple.h>
|
|
#include <linux/pm_runtime.h>
|
|
#include <linux/switchtec.h>
|
|
@@ -5604,3 +5605,34 @@ static void apex_pci_fixup_class(struct
|
|
}
|
|
DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a,
|
|
PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class);
|
|
+
|
|
+#ifdef CONFIG_PCI_HOST_THUNDER_PEM
|
|
+/*
|
|
+ * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
|
|
+ * as they are used for slots1-7 PERST#
|
|
+ */
|
|
+static void newport_pciesw_early_fixup(struct pci_dev *dev)
|
|
+{
|
|
+ u32 dw;
|
|
+
|
|
+ if (!of_machine_is_compatible("gw,newport"))
|
|
+ return;
|
|
+
|
|
+ if (dev->devfn != 0)
|
|
+ return;
|
|
+
|
|
+ dev_info(&dev->dev, "de-asserting PERST#\n");
|
|
+ pci_read_config_dword(dev, 0x62c, &dw);
|
|
+ dw |= 0xaaa8; /* GPIO1-7 outputs */
|
|
+ pci_write_config_dword(dev, 0x62c, dw);
|
|
+
|
|
+ pci_read_config_dword(dev, 0x644, &dw);
|
|
+ dw |= 0xfe; /* GPIO1-7 output high */
|
|
+ pci_write_config_dword(dev, 0x644, dw);
|
|
+
|
|
+ msleep(100);
|
|
+}
|
|
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, newport_pciesw_early_fixup);
|
|
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, newport_pciesw_early_fixup);
|
|
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, newport_pciesw_early_fixup);
|
|
+#endif /* CONFIG_PCI_HOST_THUNDER_PEM */
|