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62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)
193 lines
5.0 KiB
Diff
193 lines
5.0 KiB
Diff
From 42c792400770ec57cafce87cb9594a948d6c0700 Mon Sep 17 00:00:00 2001
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From: Marc Kleine-Budde <mkl@pengutronix.de>
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Date: Sat, 2 Jan 2021 21:38:58 +0100
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Subject: [PATCH] overlays: Add overlay for Seeed Studio CAN BUS FD
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HAT v1 (based on mcp2517fd)
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This patch adds the overlay for the Seeed Studio CAN BUS FD HAT v1 with two CAN
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FD Channels (based on mcp2517fd).
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https://www.seeedstudio.com/2-Channel-CAN-BUS-FD-Shield-for-Raspberry-Pi-p-4072.html
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The overlay was generated by:
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ovmerge -c spi1-1cs-overlay.dts,cs0_pin=18,cs0_spidev=false \
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mcp251xfd-overlay.dts,spi0-0,interrupt=25 \
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mcp251xfd-overlay.dts,spi1-0,interrupt=24
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Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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---
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arch/arm/boot/dts/overlays/Makefile | 1 +
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arch/arm/boot/dts/overlays/README | 8 +
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.../overlays/seeed-can-fd-hat-v1-overlay.dts | 138 ++++++++++++++++++
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3 files changed, 147 insertions(+)
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create mode 100644 arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts
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--- a/arch/arm/boot/dts/overlays/Makefile
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+++ b/arch/arm/boot/dts/overlays/Makefile
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@@ -159,6 +159,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
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sc16is752-spi1.dtbo \
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sdhost.dtbo \
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sdio.dtbo \
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+ seeed-can-fd-hat-v1.dtbo \
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seeed-can-fd-hat-v2.dtbo \
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sh1106-spi.dtbo \
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smi.dtbo \
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--- a/arch/arm/boot/dts/overlays/README
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+++ b/arch/arm/boot/dts/overlays/README
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@@ -2460,6 +2460,14 @@ Info: This overlay is now deprecated.
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Load: <Deprecated>
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+Name: seeed-can-fd-hat-v1
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+Info: Overlay for Seeed Studio CAN BUS FD HAT with two CAN FD channels
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+ (based on the mcp2517fd).
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+ https://www.seeedstudio.com/2-Channel-CAN-BUS-FD-Shield-for-Raspberry-Pi-p-4072.html
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+Load: dtoverlay=seeed-can-fd-hat-v1
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+Params: <None>
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+
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+
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Name: seeed-can-fd-hat-v2
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Info: Overlay for Seeed Studio CAN BUS FD HAT with two CAN FD channels
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(based on the mcp2518fd) and an RTC.
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/seeed-can-fd-hat-v1-overlay.dts
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@@ -0,0 +1,138 @@
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+// redo: ovmerge -c spi1-1cs-overlay.dts,cs0_pin=18,cs0_spidev=false mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi1-0,interrupt=24
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+
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+// Device tree overlay for https://www.seeedstudio.com/2-Channel-CAN-BUS-FD-Shield-for-Raspberry-Pi-p-4072.html
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+
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+/dts-v1/;
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+/plugin/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/pinctrl/bcm2835.h>
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+
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+/ {
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+ compatible = "brcm,bcm2835";
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+ fragment@0 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ spi1_pins: spi1_pins {
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+ brcm,pins = <19 20 21>;
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+ brcm,function = <3>;
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+ };
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+ spi1_cs_pins: spi1_cs_pins {
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+ brcm,pins = <18>;
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+ brcm,function = <1>;
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+ };
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+ };
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+ };
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+ fragment@1 {
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+ target = <&spi1>;
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+ __overlay__ {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
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+ cs-gpios = <&gpio 18 1>;
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+ status = "okay";
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+ spidev@0 {
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+ compatible = "spidev";
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+ reg = <0>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ status = "disabled";
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+ };
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+ };
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+ };
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+ fragment@2 {
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+ target = <&aux>;
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+ __overlay__ {
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+ status = "okay";
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+ };
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+ };
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+ fragment@3 {
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+ target = <&spidev0>;
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+ __overlay__ {
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+ status = "disabled";
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+ };
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+ };
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+ fragment@4 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ mcp251xfd_pins: mcp251xfd_spi0_0_pins {
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+ brcm,pins = <25>;
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+ brcm,function = <BCM2835_FSEL_GPIO_IN>;
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+ };
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+ };
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+ };
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+ fragment@5 {
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+ target-path = "/clocks";
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+ __overlay__ {
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+ clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ clock-frequency = <40000000>;
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+ };
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+ };
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+ };
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+ fragment@6 {
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+ target = <&spi0>;
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+ __overlay__ {
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+ status = "okay";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ mcp251xfd@0 {
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+ compatible = "microchip,mcp251xfd";
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+ reg = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mcp251xfd_pins>;
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+ spi-max-frequency = <20000000>;
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+ interrupt-parent = <&gpio>;
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+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
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+ clocks = <&clk_mcp251xfd_osc>;
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+ };
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+ };
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+ };
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+ fragment@7 {
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+ target-path = "spi1/spidev@0";
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+ __overlay__ {
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+ status = "disabled";
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+ };
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+ };
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+ fragment@8 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ mcp251xfd_pins_1: mcp251xfd_spi1_0_pins {
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+ brcm,pins = <24>;
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+ brcm,function = <BCM2835_FSEL_GPIO_IN>;
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+ };
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+ };
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+ };
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+ fragment@9 {
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+ target-path = "/clocks";
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+ __overlay__ {
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+ clk_mcp251xfd_osc_1: mcp251xfd-spi1-0-osc {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ clock-frequency = <40000000>;
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+ };
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+ };
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+ };
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+ fragment@10 {
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+ target = <&spi1>;
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+ __overlay__ {
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+ status = "okay";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ mcp251xfd@0 {
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+ compatible = "microchip,mcp251xfd";
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+ reg = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mcp251xfd_pins_1>;
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+ spi-max-frequency = <20000000>;
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+ interrupt-parent = <&gpio>;
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+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
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+ clocks = <&clk_mcp251xfd_osc_1>;
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+ };
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+ };
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+ };
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+};
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