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20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
175 lines
3.9 KiB
Diff
175 lines
3.9 KiB
Diff
From b60e8bcad707be3999f253d0d8a829130c1862c2 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Thu, 13 Feb 2020 16:45:24 +0100
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Subject: [PATCH] dt-bindings: display: vc4: hdmi: Add BCM2711 HDMI
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controllers bindings
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The HDMI controllers found in the BCM2711 SoC need some adjustments to the
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bindings, especially since the registers have been shuffled around in more
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register ranges.
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Cc: Rob Herring <robh+dt@kernel.org>
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Cc: devicetree@vger.kernel.org
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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.../bindings/display/brcm,bcm2835-hdmi.yaml | 118 ++++++++++++++++--
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1 file changed, 109 insertions(+), 9 deletions(-)
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--- a/Documentation/devicetree/bindings/display/brcm,bcm2835-hdmi.yaml
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+++ b/Documentation/devicetree/bindings/display/brcm,bcm2835-hdmi.yaml
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@@ -11,24 +11,58 @@ maintainers:
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properties:
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compatible:
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- const: brcm,bcm2835-hdmi
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+ enum:
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+ - brcm,bcm2835-hdmi
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+ - brcm,bcm2711-hdmi0
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+ - brcm,bcm2711-hdmi1
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reg:
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+ oneOf:
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+ - items:
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+ - description: HDMI register range
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+ - description: HD register range
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+
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+ - items:
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+ - description: HDMI controller register range
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+ - description: DVP register range
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+ - description: HDMI PHY register range
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+ - description: Rate Manager register range
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+ - description: Packet RAM register range
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+ - description: Metadata RAM register range
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+ - description: CSC register range
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+ - description: CEC register range
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+ - description: HD register range
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+
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+ reg-names:
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items:
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- - description: HDMI register range
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- - description: HD register range
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+ - const: hdmi
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+ - const: dvp
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+ - const: phy
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+ - const: rm
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+ - const: packet
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+ - const: metadata
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+ - const: csc
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+ - const: cec
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+ - const: hd
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interrupts:
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minItems: 2
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clocks:
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- items:
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- - description: The pixel clock
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- - description: The HDMI state machine clock
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+ oneOf:
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+ - items:
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+ - description: The pixel clock
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+ - description: The HDMI state machine clock
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+
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+ - items:
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+ - description: The HDMI state machine clock
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clock-names:
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- items:
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- - const: pixel
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+ oneOf:
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+ - items:
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+ - const: pixel
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+ - const: hdmi
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+
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- const: hdmi
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ddc:
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@@ -51,15 +85,54 @@ properties:
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dma-names:
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const: audio-rx
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+ resets:
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+ maxItems: 1
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+
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required:
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- compatible
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- reg
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- - interrupts
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- clocks
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- ddc
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additionalProperties: false
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+if:
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+ properties:
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+ compatible:
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+ contains:
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+ enum:
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+ - brcm,bcm2711-hdmi0
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+ - brcm,bcm2711-hdmi1
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+
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+then:
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+ properties:
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+ reg:
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+ minItems: 9
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+
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+ clocks:
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+ maxItems: 1
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+
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+ clock-names:
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+ maxItems: 1
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+
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+ required:
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+ - reg-names
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+ - resets
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+
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+else:
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+ properties:
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+ reg:
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+ maxItems: 2
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+
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+ clocks:
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+ minItems: 2
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+
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+ clock-names:
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+ minItems: 2
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+
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+ required:
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+ - interrupts
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+
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examples:
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- |
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#include <dt-bindings/clock/bcm2835.h>
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@@ -77,4 +150,31 @@ examples:
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clock-names = "pixel", "hdmi";
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};
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+ - |
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+ hdmi0: hdmi@7ef00700 {
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+ compatible = "brcm,bcm2711-hdmi0";
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+ reg = <0x7ef00700 0x300>,
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+ <0x7ef00300 0x200>,
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+ <0x7ef00f00 0x80>,
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+ <0x7ef00f80 0x80>,
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+ <0x7ef01b00 0x200>,
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+ <0x7ef01f00 0x400>,
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+ <0x7ef00200 0x80>,
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+ <0x7ef04300 0x100>,
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+ <0x7ef20000 0x100>;
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+ reg-names = "hdmi",
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+ "dvp",
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+ "phy",
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+ "rm",
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+ "packet",
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+ "metadata",
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+ "csc",
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+ "cec",
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+ "hd";
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+ clocks = <&firmware_clocks 13>;
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+ clock-names = "hdmi";
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+ resets = <&dvp 0>;
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+ ddc = <&ddc0>;
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+ };
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+
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...
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