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https://github.com/openwrt/openwrt.git
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388127abd1
mtd->size will be overrided by BMT which makes all mtd requests made by bmt fail in request size checking. this commit changes the driver to check against actual chip size in chip info as a workaround. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
682 lines
16 KiB
C
682 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
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*
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* Author: Weijie Gao <weijie.gao@mediatek.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/mutex.h>
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#include <linux/clk.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <linux/wait.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/of_platform.h>
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#include "mtk-snand.h"
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#include "mtk-snand-os.h"
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struct mtk_snand_of_id {
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enum mtk_snand_soc soc;
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};
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struct mtk_snand_mtd {
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struct mtk_snand_plat_dev pdev;
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struct clk *nfi_clk;
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struct clk *pad_clk;
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struct clk *ecc_clk;
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void __iomem *nfi_regs;
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void __iomem *ecc_regs;
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int irq;
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bool quad_spi;
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enum mtk_snand_soc soc;
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struct mtd_info mtd;
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struct mtk_snand *snf;
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struct mtk_snand_chip_info cinfo;
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uint8_t *page_cache;
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struct mutex lock;
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};
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#define mtd_to_msm(mtd) container_of(mtd, struct mtk_snand_mtd, mtd)
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static int mtk_snand_mtd_erase(struct mtd_info *mtd, struct erase_info *instr)
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{
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struct mtk_snand_mtd *msm = mtd_to_msm(mtd);
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u64 start_addr, end_addr;
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int ret;
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/* Do not allow write past end of device */
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if ((instr->addr + instr->len) > msm->cinfo.chipsize) {
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dev_err(msm->pdev.dev,
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"attempt to erase beyond end of device\n");
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return -EINVAL;
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}
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start_addr = instr->addr & (~mtd->erasesize_mask);
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end_addr = instr->addr + instr->len;
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if (end_addr & mtd->erasesize_mask) {
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end_addr = (end_addr + mtd->erasesize_mask) &
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(~mtd->erasesize_mask);
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}
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mutex_lock(&msm->lock);
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while (start_addr < end_addr) {
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if (mtk_snand_block_isbad(msm->snf, start_addr)) {
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instr->fail_addr = start_addr;
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ret = -EIO;
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break;
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}
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ret = mtk_snand_erase_block(msm->snf, start_addr);
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if (ret) {
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instr->fail_addr = start_addr;
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break;
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}
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start_addr += mtd->erasesize;
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}
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mutex_unlock(&msm->lock);
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return ret;
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}
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static int mtk_snand_mtd_read_data(struct mtk_snand_mtd *msm, uint64_t addr,
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struct mtd_oob_ops *ops)
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{
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struct mtd_info *mtd = &msm->mtd;
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size_t len, ooblen, maxooblen, chklen;
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uint32_t col, ooboffs;
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uint8_t *datcache, *oobcache;
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bool ecc_failed = false, raw = ops->mode == MTD_OPS_RAW ? true : false;
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int ret, max_bitflips = 0;
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col = addr & mtd->writesize_mask;
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addr &= ~mtd->writesize_mask;
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maxooblen = mtd_oobavail(mtd, ops);
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ooboffs = ops->ooboffs;
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ooblen = ops->ooblen;
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len = ops->len;
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datcache = len ? msm->page_cache : NULL;
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oobcache = ooblen ? msm->page_cache + mtd->writesize : NULL;
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ops->oobretlen = 0;
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ops->retlen = 0;
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while (len || ooblen) {
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if (ops->mode == MTD_OPS_AUTO_OOB)
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ret = mtk_snand_read_page_auto_oob(msm->snf, addr,
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datcache, oobcache, maxooblen, NULL, raw);
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else
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ret = mtk_snand_read_page(msm->snf, addr, datcache,
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oobcache, raw);
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if (ret < 0 && ret != -EBADMSG)
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return ret;
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if (ret == -EBADMSG) {
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mtd->ecc_stats.failed++;
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ecc_failed = true;
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} else {
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mtd->ecc_stats.corrected += ret;
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max_bitflips = max_t(int, ret, max_bitflips);
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}
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if (len) {
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/* Move data */
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chklen = mtd->writesize - col;
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if (chklen > len)
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chklen = len;
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memcpy(ops->datbuf + ops->retlen, datcache + col,
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chklen);
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len -= chklen;
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col = 0; /* (col + chklen) % */
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ops->retlen += chklen;
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}
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if (ooblen) {
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/* Move oob */
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chklen = maxooblen - ooboffs;
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if (chklen > ooblen)
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chklen = ooblen;
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memcpy(ops->oobbuf + ops->oobretlen, oobcache + ooboffs,
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chklen);
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ooblen -= chklen;
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ooboffs = 0; /* (ooboffs + chklen) % maxooblen; */
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ops->oobretlen += chklen;
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}
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addr += mtd->writesize;
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}
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return ecc_failed ? -EBADMSG : max_bitflips;
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}
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static int mtk_snand_mtd_read_oob(struct mtd_info *mtd, loff_t from,
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struct mtd_oob_ops *ops)
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{
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struct mtk_snand_mtd *msm = mtd_to_msm(mtd);
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uint32_t maxooblen;
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int ret;
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if (!ops->oobbuf && !ops->datbuf) {
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if (ops->ooblen || ops->len)
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return -EINVAL;
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return 0;
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}
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switch (ops->mode) {
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case MTD_OPS_PLACE_OOB:
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case MTD_OPS_AUTO_OOB:
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case MTD_OPS_RAW:
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break;
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default:
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dev_err(msm->pdev.dev, "unsupported oob mode: %u\n", ops->mode);
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return -EINVAL;
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}
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maxooblen = mtd_oobavail(mtd, ops);
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/* Do not allow read past end of device */
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if (ops->datbuf && (from + ops->len) > msm->cinfo.chipsize) {
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dev_err(msm->pdev.dev,
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"attempt to read beyond end of device\n");
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return -EINVAL;
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}
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if (unlikely(ops->ooboffs >= maxooblen)) {
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dev_err(msm->pdev.dev, "attempt to start read outside oob\n");
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return -EINVAL;
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}
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if (unlikely(from >= msm->cinfo.chipsize ||
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ops->ooboffs + ops->ooblen >
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((msm->cinfo.chipsize >> mtd->writesize_shift) -
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(from >> mtd->writesize_shift)) *
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maxooblen)) {
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dev_err(msm->pdev.dev,
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"attempt to read beyond end of device\n");
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return -EINVAL;
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}
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mutex_lock(&msm->lock);
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ret = mtk_snand_mtd_read_data(msm, from, ops);
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mutex_unlock(&msm->lock);
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return ret;
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}
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static int mtk_snand_mtd_write_data(struct mtk_snand_mtd *msm, uint64_t addr,
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struct mtd_oob_ops *ops)
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{
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struct mtd_info *mtd = &msm->mtd;
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size_t len, ooblen, maxooblen, chklen, oobwrlen;
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uint32_t col, ooboffs;
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uint8_t *datcache, *oobcache;
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bool raw = ops->mode == MTD_OPS_RAW ? true : false;
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int ret;
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col = addr & mtd->writesize_mask;
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addr &= ~mtd->writesize_mask;
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maxooblen = mtd_oobavail(mtd, ops);
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ooboffs = ops->ooboffs;
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ooblen = ops->ooblen;
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len = ops->len;
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datcache = len ? msm->page_cache : NULL;
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oobcache = ooblen ? msm->page_cache + mtd->writesize : NULL;
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ops->oobretlen = 0;
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ops->retlen = 0;
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while (len || ooblen) {
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if (len) {
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/* Move data */
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chklen = mtd->writesize - col;
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if (chklen > len)
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chklen = len;
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memset(datcache, 0xff, col);
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memcpy(datcache + col, ops->datbuf + ops->retlen,
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chklen);
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memset(datcache + col + chklen, 0xff,
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mtd->writesize - col - chklen);
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len -= chklen;
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col = 0; /* (col + chklen) % */
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ops->retlen += chklen;
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}
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oobwrlen = 0;
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if (ooblen) {
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/* Move oob */
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chklen = maxooblen - ooboffs;
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if (chklen > ooblen)
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chklen = ooblen;
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memset(oobcache, 0xff, ooboffs);
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memcpy(oobcache + ooboffs,
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ops->oobbuf + ops->oobretlen, chklen);
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memset(oobcache + ooboffs + chklen, 0xff,
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mtd->oobsize - ooboffs - chklen);
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oobwrlen = chklen + ooboffs;
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ooblen -= chklen;
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ooboffs = 0; /* (ooboffs + chklen) % maxooblen; */
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ops->oobretlen += chklen;
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}
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if (ops->mode == MTD_OPS_AUTO_OOB)
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ret = mtk_snand_write_page_auto_oob(msm->snf, addr,
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datcache, oobcache, oobwrlen, NULL, raw);
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else
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ret = mtk_snand_write_page(msm->snf, addr, datcache,
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oobcache, raw);
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if (ret)
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return ret;
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addr += mtd->writesize;
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}
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return 0;
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}
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static int mtk_snand_mtd_write_oob(struct mtd_info *mtd, loff_t to,
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struct mtd_oob_ops *ops)
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{
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struct mtk_snand_mtd *msm = mtd_to_msm(mtd);
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uint32_t maxooblen;
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int ret;
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if (!ops->oobbuf && !ops->datbuf) {
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if (ops->ooblen || ops->len)
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return -EINVAL;
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return 0;
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}
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switch (ops->mode) {
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case MTD_OPS_PLACE_OOB:
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case MTD_OPS_AUTO_OOB:
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case MTD_OPS_RAW:
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break;
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default:
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dev_err(msm->pdev.dev, "unsupported oob mode: %u\n", ops->mode);
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return -EINVAL;
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}
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maxooblen = mtd_oobavail(mtd, ops);
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/* Do not allow write past end of device */
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if (ops->datbuf && (to + ops->len) > msm->cinfo.chipsize) {
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dev_err(msm->pdev.dev,
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"attempt to write beyond end of device\n");
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return -EINVAL;
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}
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if (unlikely(ops->ooboffs >= maxooblen)) {
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dev_err(msm->pdev.dev,
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"attempt to start write outside oob\n");
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return -EINVAL;
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}
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if (unlikely(to >= msm->cinfo.chipsize ||
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ops->ooboffs + ops->ooblen >
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((msm->cinfo.chipsize >> mtd->writesize_shift) -
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(to >> mtd->writesize_shift)) *
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maxooblen)) {
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dev_err(msm->pdev.dev,
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"attempt to write beyond end of device\n");
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return -EINVAL;
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}
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mutex_lock(&msm->lock);
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ret = mtk_snand_mtd_write_data(msm, to, ops);
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mutex_unlock(&msm->lock);
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return ret;
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}
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static int mtk_snand_mtd_block_isbad(struct mtd_info *mtd, loff_t offs)
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{
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struct mtk_snand_mtd *msm = mtd_to_msm(mtd);
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int ret;
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mutex_lock(&msm->lock);
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ret = mtk_snand_block_isbad(msm->snf, offs);
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mutex_unlock(&msm->lock);
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return ret;
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}
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static int mtk_snand_mtd_block_markbad(struct mtd_info *mtd, loff_t offs)
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{
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struct mtk_snand_mtd *msm = mtd_to_msm(mtd);
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int ret;
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mutex_lock(&msm->lock);
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ret = mtk_snand_block_markbad(msm->snf, offs);
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mutex_unlock(&msm->lock);
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return ret;
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}
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static int mtk_snand_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobecc)
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{
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struct mtk_snand_mtd *msm = mtd_to_msm(mtd);
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if (section)
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return -ERANGE;
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oobecc->offset = msm->cinfo.fdm_size * msm->cinfo.num_sectors;
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oobecc->length = mtd->oobsize - oobecc->offset;
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return 0;
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}
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static int mtk_snand_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobfree)
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{
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struct mtk_snand_mtd *msm = mtd_to_msm(mtd);
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if (section >= msm->cinfo.num_sectors)
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return -ERANGE;
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oobfree->length = msm->cinfo.fdm_size - 1;
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oobfree->offset = section * msm->cinfo.fdm_size + 1;
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return 0;
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}
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static irqreturn_t mtk_snand_irq(int irq, void *id)
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{
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struct mtk_snand_mtd *msm = id;
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int ret;
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ret = mtk_snand_irq_process(msm->snf);
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if (ret > 0)
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return IRQ_HANDLED;
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return IRQ_NONE;
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}
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static int mtk_snand_enable_clk(struct mtk_snand_mtd *msm)
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{
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int ret;
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ret = clk_prepare_enable(msm->nfi_clk);
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if (ret) {
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dev_err(msm->pdev.dev, "unable to enable nfi clk\n");
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return ret;
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}
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ret = clk_prepare_enable(msm->pad_clk);
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if (ret) {
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dev_err(msm->pdev.dev, "unable to enable pad clk\n");
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clk_disable_unprepare(msm->nfi_clk);
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return ret;
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}
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ret = clk_prepare_enable(msm->ecc_clk);
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if (ret) {
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dev_err(msm->pdev.dev, "unable to enable ecc clk\n");
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clk_disable_unprepare(msm->nfi_clk);
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clk_disable_unprepare(msm->pad_clk);
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return ret;
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}
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return 0;
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}
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static void mtk_snand_disable_clk(struct mtk_snand_mtd *msm)
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{
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clk_disable_unprepare(msm->nfi_clk);
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clk_disable_unprepare(msm->pad_clk);
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clk_disable_unprepare(msm->ecc_clk);
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}
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static const struct mtd_ooblayout_ops mtk_snand_ooblayout = {
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.ecc = mtk_snand_ooblayout_ecc,
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.free = mtk_snand_ooblayout_free,
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};
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static struct mtk_snand_of_id mt7622_soc_id = { .soc = SNAND_SOC_MT7622 };
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static struct mtk_snand_of_id mt7629_soc_id = { .soc = SNAND_SOC_MT7629 };
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static const struct of_device_id mtk_snand_ids[] = {
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{ .compatible = "mediatek,mt7622-snand", .data = &mt7622_soc_id },
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{ .compatible = "mediatek,mt7629-snand", .data = &mt7629_soc_id },
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{ },
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};
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MODULE_DEVICE_TABLE(of, mtk_snand_ids);
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static int mtk_snand_probe(struct platform_device *pdev)
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{
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struct mtk_snand_platdata mtk_snand_pdata = {};
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struct device_node *np = pdev->dev.of_node;
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const struct of_device_id *of_soc_id;
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const struct mtk_snand_of_id *soc_id;
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struct mtk_snand_mtd *msm;
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struct mtd_info *mtd;
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struct resource *r;
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uint32_t size;
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int ret;
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of_soc_id = of_match_node(mtk_snand_ids, np);
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if (!of_soc_id)
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return -EINVAL;
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soc_id = of_soc_id->data;
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msm = devm_kzalloc(&pdev->dev, sizeof(*msm), GFP_KERNEL);
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if (!msm)
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return -ENOMEM;
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r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nfi");
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msm->nfi_regs = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(msm->nfi_regs)) {
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ret = PTR_ERR(msm->nfi_regs);
|
|
goto errout1;
|
|
}
|
|
|
|
r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ecc");
|
|
msm->ecc_regs = devm_ioremap_resource(&pdev->dev, r);
|
|
if (IS_ERR(msm->ecc_regs)) {
|
|
ret = PTR_ERR(msm->ecc_regs);
|
|
goto errout1;
|
|
}
|
|
|
|
msm->pdev.dev = &pdev->dev;
|
|
msm->quad_spi = of_property_read_bool(np, "mediatek,quad-spi");
|
|
msm->soc = soc_id->soc;
|
|
|
|
msm->nfi_clk = devm_clk_get(msm->pdev.dev, "nfi_clk");
|
|
if (IS_ERR(msm->nfi_clk)) {
|
|
ret = PTR_ERR(msm->nfi_clk);
|
|
dev_err(msm->pdev.dev, "unable to get nfi_clk, err = %d\n",
|
|
ret);
|
|
goto errout1;
|
|
}
|
|
|
|
msm->ecc_clk = devm_clk_get(msm->pdev.dev, "ecc_clk");
|
|
if (IS_ERR(msm->ecc_clk)) {
|
|
ret = PTR_ERR(msm->ecc_clk);
|
|
dev_err(msm->pdev.dev, "unable to get ecc_clk, err = %d\n",
|
|
ret);
|
|
goto errout1;
|
|
}
|
|
|
|
msm->pad_clk = devm_clk_get(msm->pdev.dev, "pad_clk");
|
|
if (IS_ERR(msm->pad_clk)) {
|
|
ret = PTR_ERR(msm->pad_clk);
|
|
dev_err(msm->pdev.dev, "unable to get pad_clk, err = %d\n",
|
|
ret);
|
|
goto errout1;
|
|
}
|
|
|
|
ret = mtk_snand_enable_clk(msm);
|
|
if (ret)
|
|
goto errout1;
|
|
|
|
/* Probe SPI-NAND Flash */
|
|
mtk_snand_pdata.soc = msm->soc;
|
|
mtk_snand_pdata.quad_spi = msm->quad_spi;
|
|
mtk_snand_pdata.nfi_base = msm->nfi_regs;
|
|
mtk_snand_pdata.ecc_base = msm->ecc_regs;
|
|
|
|
ret = mtk_snand_init(&msm->pdev, &mtk_snand_pdata, &msm->snf);
|
|
if (ret)
|
|
goto errout1;
|
|
|
|
msm->irq = platform_get_irq(pdev, 0);
|
|
if (msm->irq >= 0) {
|
|
ret = devm_request_irq(msm->pdev.dev, msm->irq, mtk_snand_irq,
|
|
0x0, "mtk-snand", msm);
|
|
if (ret) {
|
|
dev_err(msm->pdev.dev, "failed to request snfi irq\n");
|
|
goto errout2;
|
|
}
|
|
|
|
ret = dma_set_mask(msm->pdev.dev, DMA_BIT_MASK(32));
|
|
if (ret) {
|
|
dev_err(msm->pdev.dev, "failed to set dma mask\n");
|
|
goto errout3;
|
|
}
|
|
}
|
|
|
|
mtk_snand_get_chip_info(msm->snf, &msm->cinfo);
|
|
|
|
size = msm->cinfo.pagesize + msm->cinfo.sparesize;
|
|
msm->page_cache = devm_kmalloc(msm->pdev.dev, size, GFP_KERNEL);
|
|
if (!msm->page_cache) {
|
|
dev_err(msm->pdev.dev, "failed to allocate page cache\n");
|
|
ret = -ENOMEM;
|
|
goto errout3;
|
|
}
|
|
|
|
mutex_init(&msm->lock);
|
|
|
|
dev_info(msm->pdev.dev,
|
|
"chip is %s, size %lluMB, page size %u, oob size %u\n",
|
|
msm->cinfo.model, msm->cinfo.chipsize >> 20,
|
|
msm->cinfo.pagesize, msm->cinfo.sparesize);
|
|
|
|
/* Initialize mtd for SPI-NAND */
|
|
mtd = &msm->mtd;
|
|
|
|
mtd->owner = THIS_MODULE;
|
|
mtd->dev.parent = &pdev->dev;
|
|
mtd->type = MTD_NANDFLASH;
|
|
mtd->flags = MTD_CAP_NANDFLASH;
|
|
|
|
mtd_set_of_node(mtd, np);
|
|
|
|
mtd->size = msm->cinfo.chipsize;
|
|
mtd->erasesize = msm->cinfo.blocksize;
|
|
mtd->writesize = msm->cinfo.pagesize;
|
|
mtd->writebufsize = mtd->writesize;
|
|
mtd->oobsize = msm->cinfo.sparesize;
|
|
mtd->oobavail = msm->cinfo.num_sectors * (msm->cinfo.fdm_size - 1);
|
|
|
|
mtd->erasesize_shift = ffs(mtd->erasesize) - 1;
|
|
mtd->writesize_shift = ffs(mtd->writesize) - 1;
|
|
mtd->erasesize_mask = (1 << mtd->erasesize_shift) - 1;
|
|
mtd->writesize_mask = (1 << mtd->writesize_shift) - 1;
|
|
|
|
mtd->ooblayout = &mtk_snand_ooblayout;
|
|
|
|
mtd->ecc_strength = msm->cinfo.ecc_strength;
|
|
mtd->bitflip_threshold = (mtd->ecc_strength * 3) / 4;
|
|
mtd->ecc_step_size = msm->cinfo.sector_size;
|
|
|
|
mtd->_erase = mtk_snand_mtd_erase;
|
|
mtd->_read_oob = mtk_snand_mtd_read_oob;
|
|
mtd->_write_oob = mtk_snand_mtd_write_oob;
|
|
mtd->_block_isbad = mtk_snand_mtd_block_isbad;
|
|
mtd->_block_markbad = mtk_snand_mtd_block_markbad;
|
|
|
|
ret = mtd_device_register(mtd, NULL, 0);
|
|
if (ret) {
|
|
dev_err(msm->pdev.dev, "failed to register mtd partition\n");
|
|
goto errout4;
|
|
}
|
|
|
|
platform_set_drvdata(pdev, msm);
|
|
|
|
return 0;
|
|
|
|
errout4:
|
|
devm_kfree(msm->pdev.dev, msm->page_cache);
|
|
|
|
errout3:
|
|
if (msm->irq >= 0)
|
|
devm_free_irq(msm->pdev.dev, msm->irq, msm);
|
|
|
|
errout2:
|
|
mtk_snand_cleanup(msm->snf);
|
|
|
|
errout1:
|
|
devm_kfree(msm->pdev.dev, msm);
|
|
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int mtk_snand_remove(struct platform_device *pdev)
|
|
{
|
|
struct mtk_snand_mtd *msm = platform_get_drvdata(pdev);
|
|
struct mtd_info *mtd = &msm->mtd;
|
|
int ret;
|
|
|
|
ret = mtd_device_unregister(mtd);
|
|
if (ret)
|
|
return ret;
|
|
|
|
mtk_snand_cleanup(msm->snf);
|
|
|
|
if (msm->irq >= 0)
|
|
devm_free_irq(msm->pdev.dev, msm->irq, msm);
|
|
|
|
mtk_snand_disable_clk(msm);
|
|
|
|
devm_kfree(msm->pdev.dev, msm->page_cache);
|
|
devm_kfree(msm->pdev.dev, msm);
|
|
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver mtk_snand_driver = {
|
|
.probe = mtk_snand_probe,
|
|
.remove = mtk_snand_remove,
|
|
.driver = {
|
|
.name = "mtk-snand",
|
|
.of_match_table = mtk_snand_ids,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(mtk_snand_driver);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Weijie Gao <weijie.gao@mediatek.com>");
|
|
MODULE_DESCRIPTION("MeidaTek SPI-NAND Flash Controller Driver");
|