openwrt/target/linux/mediatek/dts/mt7981b-cmcc-a10-stock.dts
Tianling Shen 96c6608346 mediatek: add support for CMCC A10
This board is also as known as SuperElectron ZN-M5 and ZN-M8. However,
for ZN-M5 and ZN-M8, there's another version uses ZX279128 as CPU
chip, which is unsupported.
You can check it in "高级设置" > "系统日志" > "内核日志" page from webUI.

Hardware specification:
  SoC: MediaTek MT7981B 2x A53
  Flash: 128 MB SPI-NAND
  RAM: 256MB
  Ethernet: 4x 10/100/1000 Mbps
  Switch: MediaTek MT7531AE
  WiFi: MediaTek MT7976C
  Button: Reset, WPS
  Power: DC 12V 1A

Stock layout flash instructions:
Login into webUI and upload sysupgrade firmware in "系统管理" > "升级固件" page.
Remember to unselect "保留配置" ("Keep configurations") first before doing that.

OpenWrt U-Boot layout flash instructions:
1. Flash stock layout firmware first.
2. Connect to the device via SSH, and backup everything,
   especially 'Factory' partition.
3. Unlock MTD partitions:
   apk update && apk add kmod-mtd-rw
   insmod mtd-rw i_want_a_brick=1
4. Write new BL2 and FIP:
   mtd write openwrt-mediatek-filogic-cmcc_a10-ubootmod-preloader.bin BL2
   mtd write openwrt-mediatek-filogic-cmcc_a10-ubootmod-bl31-uboot.fip FIP
5. Set static IP on your PC:
   IP 192.168.1.254/24, GW 192.168.1.1
6. Serve OpenWrt initramfs image using TFTP server.
7. Cut off the power and re-engage, wait for TFTP recovery to complete.
8. After OpenWrt has booted, perform sysupgrade.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/18121
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2025-03-08 15:44:56 +01:00

41 lines
663 B
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7981b-cmcc-a10.dtsi"
/ {
model = "CMCC A10 (stock layout)";
compatible = "cmcc,a10-stock", "mediatek,mt7981";
};
&partitions {
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
};
partition@4580000 {
label = "firmware_backup";
reg = <0x4580000 0x2000000>;
read-only;
};
partition@6580000 {
label = "zrsave";
reg = <0x6580000 0x100000>;
read-only;
};
partition@6680000 {
label = "config2";
reg = <0x6680000 0x100000>;
read-only;
};
};
&spi_nand {
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
};