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9703a2adcc
Refresh all patches on top of kernel 5.10.138. The following patches were applied upstream: bcm27xx/patches-5.10/950-0311-drm-vc4-Adopt-the-dma-configuration-from-the-HVS-or-.patch bcm27xx/patches-5.10/950-0317-vc4_hdmi-Remove-firmware-logic-for-MAI-threshold-set.patch bcm27xx/patches-5.10/950-0346-drm-vc4-A-present-but-empty-dmas-disables-audio.patch bcm27xx/patches-5.10/950-0354-drm-vc4-Add-the-2711-HVS-as-a-suitable-DMA-node.patch bcm27xx/patches-5.10/950-0413-drm-vc4-hdmi-Don-t-access-the-connector-state-in-res.patch bcm27xx/patches-5.10/950-0505-vc4-drm-Avoid-full-hdmi-audio-fifo-writes.patch bcm27xx/patches-5.10/950-0512-vc4-drm-vc4_plane-Remove-subpixel-positioning-check.patch bcm27xx/patches-5.10/950-0560-drm-vc4-drv-Remove-the-DSI-pointer-in-vc4_drv.patch bcm27xx/patches-5.10/950-0561-drm-vc4-dsi-Use-snprintf-for-the-PHY-clocks-instead-.patch bcm27xx/patches-5.10/950-0562-drm-vc4-dsi-Introduce-a-variant-structure.patch bcm27xx/patches-5.10/950-0565-drm-vc4-Correct-pixel-order-for-DSI0.patch bcm27xx/patches-5.10/950-0566-drm-vc4-Register-dsi0-as-the-correct-vc4-encoder-typ.patch bcm27xx/patches-5.10/950-0567-drm-vc4-Fix-dsi0-interrupt-support.patch bcm27xx/patches-5.10/950-0568-drm-vc4-Add-correct-stop-condition-to-vc4_dsi_encode.patch bcm27xx/patches-5.10/950-0647-drm-vc4-Fix-timings-for-interlaced-modes.patch bcm27xx/patches-5.10/950-0695-drm-vc4-Fix-margin-calculations-for-the-right-bottom.patch Upstream sets the pixel clock to 340MHz now, do not set it to 600MHz any more. bcm27xx/patches-5.10/950-0576-drm-vc4-hdmi-Raise-the-maximum-clock-rate.patch Fixes:89956c6532
("kernel: bump 5.10 to 5.10.138") Fixes:4209c33ae2
("kernel: bump 5.10 to 5.10.137") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
162 lines
6.1 KiB
Diff
162 lines
6.1 KiB
Diff
From a7a8569adc035cf74a3b82d00ba266ac9b249a15 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Tue, 15 Dec 2020 16:42:36 +0100
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Subject: [PATCH] drm/vc4: Pass the atomic state to encoder hooks
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We'll need to access the connector state in our encoder setup, so let's
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just pass the whole DRM state to our private encoder hooks.
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Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_crtc.c | 18 ++++++++++--------
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drivers/gpu/drm/vc4/vc4_drv.h | 10 +++++-----
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drivers/gpu/drm/vc4/vc4_hdmi.c | 15 ++++++++++-----
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3 files changed, 25 insertions(+), 18 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_crtc.c
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+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
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@@ -422,7 +422,9 @@ static void require_hvs_enabled(struct d
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SCALER_DISPCTRL_ENABLE);
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}
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-static int vc4_crtc_disable(struct drm_crtc *crtc, unsigned int channel)
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+static int vc4_crtc_disable(struct drm_crtc *crtc,
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+ struct drm_atomic_state *state,
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+ unsigned int channel)
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{
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struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc);
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struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
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@@ -454,13 +456,13 @@ static int vc4_crtc_disable(struct drm_c
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mdelay(20);
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if (vc4_encoder && vc4_encoder->post_crtc_disable)
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- vc4_encoder->post_crtc_disable(encoder);
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+ vc4_encoder->post_crtc_disable(encoder, state);
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vc4_crtc_pixelvalve_reset(crtc);
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vc4_hvs_stop_channel(dev, channel);
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if (vc4_encoder && vc4_encoder->post_crtc_powerdown)
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- vc4_encoder->post_crtc_powerdown(encoder);
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+ vc4_encoder->post_crtc_powerdown(encoder, state);
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return 0;
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}
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@@ -487,7 +489,7 @@ int vc4_crtc_disable_at_boot(struct drm_
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if (channel < 0)
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return 0;
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- return vc4_crtc_disable(crtc, channel);
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+ return vc4_crtc_disable(crtc, NULL, channel);
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}
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static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,
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@@ -503,7 +505,7 @@ static void vc4_crtc_atomic_disable(stru
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/* Disable vblank irq handling before crtc is disabled. */
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drm_crtc_vblank_off(crtc);
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- vc4_crtc_disable(crtc, old_vc4_state->assigned_channel);
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+ vc4_crtc_disable(crtc, state, old_vc4_state->assigned_channel);
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/*
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* Make sure we issue a vblank event after disabling the CRTC if
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@@ -537,14 +539,14 @@ static void vc4_crtc_atomic_enable(struc
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vc4_hvs_atomic_enable(crtc, state);
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if (vc4_encoder->pre_crtc_configure)
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- vc4_encoder->pre_crtc_configure(encoder);
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+ vc4_encoder->pre_crtc_configure(encoder, state);
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vc4_crtc_config_pv(crtc);
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CRTC_WRITE(PV_CONTROL, CRTC_READ(PV_CONTROL) | PV_CONTROL_EN);
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if (vc4_encoder->pre_crtc_enable)
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- vc4_encoder->pre_crtc_enable(encoder);
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+ vc4_encoder->pre_crtc_enable(encoder, state);
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/* When feeding the transposer block the pixelvalve is unneeded and
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* should not be enabled.
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@@ -553,7 +555,7 @@ static void vc4_crtc_atomic_enable(struc
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CRTC_READ(PV_V_CONTROL) | PV_VCONTROL_VIDEN);
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if (vc4_encoder->post_crtc_enable)
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- vc4_encoder->post_crtc_enable(encoder);
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+ vc4_encoder->post_crtc_enable(encoder, state);
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}
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static enum drm_mode_status vc4_crtc_mode_valid(struct drm_crtc *crtc,
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--- a/drivers/gpu/drm/vc4/vc4_drv.h
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+++ b/drivers/gpu/drm/vc4/vc4_drv.h
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@@ -448,12 +448,12 @@ struct vc4_encoder {
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enum vc4_encoder_type type;
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u32 clock_select;
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- void (*pre_crtc_configure)(struct drm_encoder *encoder);
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- void (*pre_crtc_enable)(struct drm_encoder *encoder);
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- void (*post_crtc_enable)(struct drm_encoder *encoder);
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+ void (*pre_crtc_configure)(struct drm_encoder *encoder, struct drm_atomic_state *state);
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+ void (*pre_crtc_enable)(struct drm_encoder *encoder, struct drm_atomic_state *state);
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+ void (*post_crtc_enable)(struct drm_encoder *encoder, struct drm_atomic_state *state);
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- void (*post_crtc_disable)(struct drm_encoder *encoder);
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- void (*post_crtc_powerdown)(struct drm_encoder *encoder);
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+ void (*post_crtc_disable)(struct drm_encoder *encoder, struct drm_atomic_state *state);
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+ void (*post_crtc_powerdown)(struct drm_encoder *encoder, struct drm_atomic_state *state);
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};
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static inline struct vc4_encoder *
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -416,7 +416,8 @@ static void vc4_hdmi_set_infoframes(stru
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vc4_hdmi_set_audio_infoframe(encoder);
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}
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-static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder)
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+static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder,
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+ struct drm_atomic_state *state)
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{
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struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
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@@ -429,7 +430,8 @@ static void vc4_hdmi_encoder_post_crtc_d
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HDMI_READ(HDMI_VID_CTL) | VC4_HD_VID_CTL_BLANKPIX);
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}
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-static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder)
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+static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder,
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+ struct drm_atomic_state *state)
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{
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struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
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int ret;
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@@ -642,7 +644,8 @@ static void vc4_hdmi_recenter_fifo(struc
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"VC4_HDMI_FIFO_CTL_RECENTER_DONE");
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}
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-static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder)
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+static void vc4_hdmi_encoder_pre_crtc_configure(struct drm_encoder *encoder,
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+ struct drm_atomic_state *state)
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{
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struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
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struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
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@@ -724,7 +727,8 @@ static void vc4_hdmi_encoder_pre_crtc_co
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vc4_hdmi->variant->set_timings(vc4_hdmi, mode);
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}
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-static void vc4_hdmi_encoder_pre_crtc_enable(struct drm_encoder *encoder)
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+static void vc4_hdmi_encoder_pre_crtc_enable(struct drm_encoder *encoder,
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+ struct drm_atomic_state *state)
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{
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struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
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struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
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@@ -746,7 +750,8 @@ static void vc4_hdmi_encoder_pre_crtc_en
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HDMI_WRITE(HDMI_FIFO_CTL, VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N);
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}
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-static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder)
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+static void vc4_hdmi_encoder_post_crtc_enable(struct drm_encoder *encoder,
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+ struct drm_atomic_state *state)
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{
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struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
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struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
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