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1b2fefb244
Refreshed patches, removed upstreamed patch: generic/pending: 001-v5.4-pinctrl-qcom-fix-wrong-write-in-update_dual_edge.patch.patch Run tested: qemu-x86-64 Build tested: x86/64, ath79/nand, imx6, sunxi/a53 Signed-off-by: Petr Štetiar <ynezz@true.cz>
155 lines
4.1 KiB
Diff
155 lines
4.1 KiB
Diff
From a893019278e8030fbe251cdaa9d93b8257d1c083 Mon Sep 17 00:00:00 2001
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From: Ioana Radulescu <ruxandra.radulescu@nxp.com>
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Date: Thu, 5 Sep 2019 19:31:32 +0300
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Subject: [PATCH] dpaa2-eth: Add DCB ops
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Add a skeleton implementation of DCB PFC ops. Actual hardware
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configuration to be added in further commits.
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Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
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---
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drivers/net/ethernet/freescale/dpaa2/Kconfig | 9 +++
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drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c | 84 ++++++++++++++++++++++++
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drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h | 5 ++
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3 files changed, 98 insertions(+)
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--- a/drivers/net/ethernet/freescale/dpaa2/Kconfig
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+++ b/drivers/net/ethernet/freescale/dpaa2/Kconfig
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@@ -8,6 +8,15 @@ config FSL_DPAA2_ETH
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The driver manages network objects discovered on the Freescale
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MC bus.
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+if FSL_DPAA2_ETH
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+config FSL_DPAA2_ETH_DCB
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+ bool "Data Center Bridging (DCB) Support"
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+ default n
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+ depends on DCB
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+ help
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+ Enable Priority-Based Flow Control (PFC) support in the driver
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+endif
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+
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config FSL_DPAA2_PTP_CLOCK
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tristate "Freescale DPAA2 PTP Clock"
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depends on FSL_DPAA2_ETH && PTP_1588_CLOCK_QORIQ
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--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
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+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
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@@ -3612,6 +3612,81 @@ static void del_ch_napi(struct dpaa2_eth
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}
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}
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+#ifdef CONFIG_FSL_DPAA2_ETH_DCB
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+static int dpaa2_eth_dcbnl_ieee_getpfc(struct net_device *net_dev,
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+ struct ieee_pfc *pfc)
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+{
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+ struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
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+
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+ memcpy(pfc, &priv->pfc, sizeof(priv->pfc));
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+ pfc->pfc_cap = dpaa2_eth_tc_count(priv);
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+
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+ return 0;
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+}
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+
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+static int dpaa2_eth_dcbnl_ieee_setpfc(struct net_device *net_dev,
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+ struct ieee_pfc *pfc)
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+{
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+ struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
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+
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+ if (pfc->mbc || pfc->delay)
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+ return -EOPNOTSUPP;
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+
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+ /* If same PFC enabled mask, nothing to do */
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+ if (priv->pfc.pfc_en == pfc->pfc_en)
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+ return 0;
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+
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+ memcpy(&priv->pfc, pfc, sizeof(priv->pfc));
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+
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+ return 0;
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+}
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+
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+static u8 dpaa2_eth_dcbnl_getdcbx(struct net_device *net_dev)
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+{
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+ struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
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+
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+ return priv->dcbx_mode;
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+}
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+
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+static u8 dpaa2_eth_dcbnl_setdcbx(struct net_device *net_dev, u8 mode)
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+{
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+ struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
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+
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+ priv->dcbx_mode = mode;
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+ return 0;
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+}
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+
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+static u8 dpaa2_eth_dcbnl_getcap(struct net_device *net_dev, int capid, u8 *cap)
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+{
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+ struct dpaa2_eth_priv *priv = netdev_priv(net_dev);
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+
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+ switch (capid) {
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+ case DCB_CAP_ATTR_PFC:
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+ *cap = true;
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+ break;
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+ case DCB_CAP_ATTR_PFC_TCS:
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+ *cap = 1 << (dpaa2_eth_tc_count(priv) - 1);
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+ break;
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+ case DCB_CAP_ATTR_DCBX:
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+ *cap = priv->dcbx_mode;
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+ break;
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+ default:
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+ *cap = false;
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+ break;
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+ }
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+
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+ return 0;
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+}
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+
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+const struct dcbnl_rtnl_ops dpaa2_eth_dcbnl_ops = {
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+ .ieee_getpfc = dpaa2_eth_dcbnl_ieee_getpfc,
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+ .ieee_setpfc = dpaa2_eth_dcbnl_ieee_setpfc,
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+ .getdcbx = dpaa2_eth_dcbnl_getdcbx,
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+ .setdcbx = dpaa2_eth_dcbnl_setdcbx,
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+ .getcap = dpaa2_eth_dcbnl_getcap,
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+};
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+#endif
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+
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static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev)
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{
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struct device *dev;
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@@ -3701,6 +3776,15 @@ static int dpaa2_eth_probe(struct fsl_mc
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if (err)
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goto err_alloc_rings;
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+#ifdef CONFIG_FSL_DPAA2_ETH_DCB
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+ if (dpaa2_eth_has_pause_support(priv) && priv->vlan_cls_enabled) {
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+ priv->dcbx_mode = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE;
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+ net_dev->dcbnl_ops = &dpaa2_eth_dcbnl_ops;
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+ } else {
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+ dev_dbg(dev, "PFC not supported\n");
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+ }
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+#endif
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+
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err = setup_irqs(dpni_dev);
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if (err) {
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netdev_warn(net_dev, "Failed to set link interrupt, fall back to polling\n");
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--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h
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+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h
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@@ -6,6 +6,7 @@
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#ifndef __DPAA2_ETH_H
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#define __DPAA2_ETH_H
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+#include <linux/dcbnl.h>
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#include <linux/netdevice.h>
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#include <linux/if_vlan.h>
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#include <linux/fsl/mc.h>
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@@ -423,6 +424,10 @@ struct dpaa2_eth_priv {
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struct dpaa2_eth_cls_rule *cls_rules;
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u8 rx_cls_enabled;
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u8 vlan_cls_enabled;
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+#ifdef CONFIG_FSL_DPAA2_ETH_DCB
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+ u8 dcbx_mode;
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+ struct ieee_pfc pfc;
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+#endif
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struct bpf_prog *xdp_prog;
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#ifdef CONFIG_DEBUG_FS
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struct dpaa2_debugfs dbg;
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