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3f78cadedd
This is compile tested only, please run test and report back. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 41531
612 lines
17 KiB
Diff
612 lines
17 KiB
Diff
--- /dev/null
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+++ b/drivers/usb/host/ehci-fotg2xx.c
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@@ -0,0 +1,459 @@
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+/*
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+ * EHCI Host Controller driver
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+ *
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+ * Copyright (C) 2006 Sony Computer Entertainment Inc.
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+ * Copyright 2006 Sony Corp.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; version 2 of the License.
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+ */
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+
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+#include <linux/platform_device.h>
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+#include <mach/hardware.h>
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+
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+#define otg_set(port, bits) writel(readl(hcd->regs + port) | bits, hcd->regs + port)
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+
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+#define otg_clear(port, bits) writel(readl(hcd->regs + port) & ~bits, hcd->regs + port)
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+
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+#define GLOBAL_ISR 0xC0
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+#define GLOBAL_ICR 0xC4
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+
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+#define HCD_MISC 0x40
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+
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+#define OTGC_SCR 0x80
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+#define OTGC_INT_EN 0x88
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+
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+#define GLOBAL_INT_POLARITY (1 << 3)
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+#define GLOBAL_INT_MASK_HC (1 << 2)
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+#define GLOBAL_INT_MASK_OTG (1 << 1)
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+#define GLOBAL_INT_MASK_DEV (1 << 0)
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+
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+#define OTGC_SCR_ID (1 << 21)
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+#define OTGC_SCR_CROLE (1 << 20)
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+#define OTGC_SCR_VBUS_VLD (1 << 19)
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+#define OTGC_SCR_A_SRP_RESP_TYPE (1 << 8)
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+#define OTGC_SCR_A_SRP_DET_EN (1 << 7)
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+#define OTGC_SCR_A_SET_B_HNP_EN (1 << 6)
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+#define OTGC_SCR_A_BUS_DROP (1 << 5)
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+#define OTGC_SCR_A_BUS_REQ (1 << 4)
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+
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+#define OTGC_INT_APLGRMV (1 << 12)
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+#define OTGC_INT_BPLGRMV (1 << 11)
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+#define OTGC_INT_OVC (1 << 10)
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+#define OTGC_INT_IDCHG (1 << 9)
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+#define OTGC_INT_RLCHG (1 << 8)
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+#define OTGC_INT_AVBUSERR (1 << 5)
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+#define OTGC_INT_ASRPDET (1 << 4)
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+#define OTGC_INT_BSRPDN (1 << 0)
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+
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+#define OTGC_INT_A_TYPE (OTGC_INT_ASRPDET|OTGC_INT_AVBUSERR|OTGC_INT_OVC|OTGC_INT_RLCHG|OTGC_INT_IDCHG|OTGC_INT_APLGRMV)
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+#define OTGC_INT_B_TYPE (OTGC_INT_AVBUSERR|OTGC_INT_OVC|OTGC_INT_RLCHG|OTGC_INT_IDCHG)
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+
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+static void fotg2xx_otgc_role_change(struct usb_hcd *hcd);
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+
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+static void fotg2xx_otgc_init(struct usb_hcd *hcd)
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+{
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+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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+ unsigned int reg;
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+
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+ reg = __raw_readl(hcd->regs + OTGC_SCR);
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+ ehci_info(ehci, "role detected: %s, ",
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+ (reg & OTGC_SCR_CROLE) ? "Peripheral" : "Host");
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+
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+ if (reg & OTGC_SCR_ID)
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+ ehci_info(ehci, "B-Device (may be unsupported!)\n");
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+ else
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+ ehci_info(ehci, "A-Device\n");
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+
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+ /* Enable the SRP detect */
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+ reg &= ~OTGC_SCR_A_SRP_RESP_TYPE;
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+ __raw_writel(reg, hcd->regs + OTGC_SCR);
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+
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+ reg = __raw_readl(hcd->regs + OTGC_INT_EN);
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+ /* clear INT B: bits AVBUSERR | OVC | RLCHG | IDCHG */
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+ reg &= ~OTGC_INT_B_TYPE;
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+ /* set INT A: bits ASRPDET | AVBUSERR | OVC | RLCHG | IDCHG | APLGRMV */
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+ reg |= OTGC_INT_A_TYPE;
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+ __raw_writel(reg, hcd->regs + OTGC_INT_EN);
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+
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+ reg = __raw_readl(hcd->regs + GLOBAL_ICR);
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+ reg &= ~GLOBAL_INT_MASK_OTG;
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+ __raw_writel(reg, hcd->regs + GLOBAL_ICR);
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+
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+ /* setup MISC register, fixes timing problems */
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+ reg = __raw_readl(hcd->regs + HCD_MISC);
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+ reg |= 0xD;
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+ __raw_writel(reg, hcd->regs + HCD_MISC);
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+
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+ fotg2xx_otgc_role_change(hcd);
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+}
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+
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+static void fotg2xx_otgh_close(struct usb_hcd *hcd)
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+{
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+ unsigned int reg;
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+
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+ /* <1>.Enable Interrupt Mask */
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+ reg = __raw_readl(hcd->regs + GLOBAL_ICR);
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+ reg |= GLOBAL_INT_MASK_HC;
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+ __raw_writel(reg, hcd->regs + GLOBAL_ICR);
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+
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+ /* <2>.Clear the Interrupt status */
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+ reg = __raw_readl(hcd->regs + 0x18);
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+ reg &= 0x0000003F;
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+ __raw_writel(reg, hcd->regs + 0x14);
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+}
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+
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+static void fotg2xx_otgh_open(struct usb_hcd *hcd)
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+{
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+ unsigned int reg;
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+
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+ reg = __raw_readl(hcd->regs + OTGC_SCR);
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+ reg &= ~OTGC_SCR_A_SRP_DET_EN;
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+ __raw_writel(reg, hcd->regs + OTGC_SCR);
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+
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+ reg = __raw_readl(hcd->regs + GLOBAL_ICR);
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+ reg &= ~GLOBAL_INT_MASK_HC;
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+ __raw_writel(reg, hcd->regs + GLOBAL_ICR);
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+}
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+
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+/* change to host role */
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+static void fotg2xx_otgc_role_change(struct usb_hcd *hcd)
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+{
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+
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+ /* clear A_SET_B_HNP_EN */
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+ otg_clear(0x80, BIT(6));
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+
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+ /*** Enable VBUS driving */
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+ if (readl(hcd->regs + 0x80) & BIT(19))
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+ printk(KERN_INFO "VBUS already enabled\n");
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+ else {
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+ int cnt = 0;
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+
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+ /* clear A_BUS_DROP */
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+ otg_clear(0x80, BIT(5));
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+
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+ /* set A_BUS_REQ */
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+ otg_set(0x80, BIT(4));
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+
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+ /* set global bus reg to VBUS on */
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+ writel(readl(IO_ADDRESS(0x40000000) + 0x30) | ((BIT(21)|BIT(22))),
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+ IO_ADDRESS(0x40000000) + 0x30);
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+
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+ if (readl(hcd->regs + 0x80) & (1<<19)) {
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+ printk(KERN_INFO "Waiting for VBus");
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+ while (!(readl(hcd->regs + 0x80) & (1<<19)) && (cnt < 80)) {
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+ printk(KERN_CONT ".");
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+ cnt++;
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+ }
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+ printk(KERN_CONT "\n");
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+ } else
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+ printk(KERN_INFO "VBUS enabled.\n");
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+
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+ mdelay(1);
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+ }
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+ fotg2xx_otgh_open(hcd);
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+}
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+
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+static int fotg2xx_ehci_hc_reset(struct usb_hcd *hcd)
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+{
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+ int result;
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+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
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+
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+ ehci->caps = hcd->regs;
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+ ehci->regs = hcd->regs + HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
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+
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+ dbg_hcs_params(ehci, "reset");
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+ dbg_hcc_params(ehci, "reset");
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+
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+ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
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+ hcd->has_tt = 1;
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+
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+ result = ehci_halt(ehci);
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+ if (result)
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+ return result;
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+
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+ return ehci_init(hcd);
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+}
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+
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+/*
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+ * Name: OTGC_INT_ISR
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+ * Description:This interrupt service routine belongs to the OTG-Controller
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+ * <1>.Check for ID_Change
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+ * <2>.Check for RL_Change
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+ * <3>.Error Detect
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+ * Input: wINTStatus
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+ * Output:void
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+ */
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+void fotg2xx_int_isr(struct usb_hcd *hcd, u32 wINTStatus)
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+{
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+ /* <1>.Check for ID_Change */
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+ if (wINTStatus&OTGC_INT_IDCHG) {
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+ if ((readl(hcd->regs + 0x80) & BIT(21)) != 0)
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+ fotg2xx_otgc_init(hcd); /* Change to B Type */
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+ else
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+ fotg2xx_otgc_init(hcd); /* Change to A Type */
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+
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+ return;
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+ }
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+
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+ /* <2>.Check for RL_Change */
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+ if (wINTStatus&OTGC_INT_RLCHG)
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+ fotg2xx_otgc_role_change(hcd);
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+
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+ /* <3>.Error Detect */
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+ if (wINTStatus&OTGC_INT_AVBUSERR)
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+ printk(KERN_ERR "VBus error!\n");
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+
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+ if (wINTStatus&OTGC_INT_OVC)
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+ printk(KERN_WARNING "Overcurrent detected!\n");
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+
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+ /* <3>.Check for Type-A/Type-B Interrupt */
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+ if ((readl(hcd->regs + 0x80) & BIT(21)) == 0) { /*For Type-A Interrupt*/
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+ if (wINTStatus & (OTGC_INT_A_TYPE | OTGC_INT_ASRPDET)) {
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+ /* <1>.SRP detected => then set global variable */
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+ printk(KERN_WARNING "SRP detected, but not implemented!\n");
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+
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+#if 0
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+ u32 wTempCounter;
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+ /* <2>.Turn on the V Bus */
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+ pFTC_OTG->otg.state = OTG_STATE_A_WAIT_VRISE;
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+ OTGC_enable_vbus_draw_storlink(1);
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+ pFTC_OTG->otg.state = OTG_STATE_A_HOST;
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+ /* <3>.Should waiting for Device-Connect Wait 300ms */
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+ INFO(pFTC_OTG, ">>> OTG-A Waiting for OTG-B Connect,\n");
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+ wTempCounter = 0;
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+ while (mwHost20_PORTSC_ConnectStatus_Rd() == 0) {
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+ mdelay(1);
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+ wTempCounter++;
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+ /* Waiting for 300 ms */
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+ if (wTempCounter > 300) {
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+ mdwOTGC_Control_A_SRP_DET_EN_Clr();
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+ INFO(pFTC_OTG, ">>> OTG-B do not connect under 300 ms...\n");
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+ break;
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+ }
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+ }
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+ /* <4>.If Connect => issue quick Reset */
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+ if (mwHost20_PORTSC_ConnectStatus_Rd() > 0) {
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+ mdelay(300); /* For OPT-A Test */
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+ OTGH_host_quick_Reset();
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+ OTGH_Open();
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+ pFTC_OTG->otg.host->A_Disable_Set_Feature_HNP = 0;
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+ }
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+#endif
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+ }
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+ } else { /* For Type-B Interrupt */
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+ BUG();
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+ }
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+}
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+
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+static irqreturn_t fotg2xx_ehci_irq(int irq, void *devid)
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+{
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+ struct usb_hcd *hcd = devid;
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+ u32 val;
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+
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+ /* OTG Interrupt Status Register */
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+ val = readl(hcd->regs + 0x84);
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+
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+ /* OTG stuff */
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+ if (val) {
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+ /* supposed to do "INT STS Clr" - XXX */
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+ writel(readl(hcd->regs + 0x84) | val, hcd->regs + 0x84);
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+
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+ fotg2xx_int_isr(hcd, val);
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+
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+ /* supposed to do "INT STS Clr" - XXX */
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+ writel(readl(hcd->regs + 0x84) | val, hcd->regs + 0x84);
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+
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+ return IRQ_HANDLED;
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+ }
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+
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+ if ((readl(hcd->regs + 0x80) & BIT(20)) == 0) { /* Role is HOST */
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+ if (readl(hcd->regs + 0xC0) & BIT(2)) { /* INT STS HOST */
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+ /* leave this for ehci irq handler */
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+ return IRQ_NONE;
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+ }
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+ } else
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+ printk(KERN_WARNING
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+ "received irq for peripheral - don't know what to do!\n");
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+
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+ /* do not call the ehci irq handler */
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+ return IRQ_HANDLED;
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+}
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+
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+static int fotg2xx_ehci_run(struct usb_hcd *hcd)
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+{
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+ int retval;
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+
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+ retval = ehci_run(hcd);
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+
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+ fotg2xx_otgh_close(hcd);
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+ fotg2xx_otgc_init(hcd);
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+
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+ return retval;
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+}
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+
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+static const struct hc_driver fotg2xx_ehci_hc_driver = {
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+ .description = hcd_name,
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+ .product_desc = "FOTG2XX EHCI Host Controller",
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+ .hcd_priv_size = sizeof(struct ehci_hcd),
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+ .irq = ehci_irq,
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+ .flags = HCD_MEMORY | HCD_USB2,
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+ .reset = fotg2xx_ehci_hc_reset,
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+ .start = fotg2xx_ehci_run,
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+ .stop = ehci_stop,
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+ .shutdown = ehci_shutdown,
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+
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+ .urb_enqueue = ehci_urb_enqueue,
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+ .urb_dequeue = ehci_urb_dequeue,
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+ .endpoint_disable = ehci_endpoint_disable,
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+ .endpoint_reset = ehci_endpoint_reset,
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+
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+ .get_frame_number = ehci_get_frame,
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+
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+ .hub_status_data = ehci_hub_status_data,
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+ .hub_control = ehci_hub_control,
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+#if defined(CONFIG_PM)
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+ .bus_suspend = ehci_bus_suspend,
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+ .bus_resume = ehci_bus_resume,
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+#endif
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+ .relinquish_port = ehci_relinquish_port,
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+ .port_handed_over = ehci_port_handed_over,
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+
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+ .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
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+};
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+
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+static int fotg2xx_ehci_probe(struct platform_device *pdev)
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+{
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+ const struct hc_driver *driver = &fotg2xx_ehci_hc_driver;
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+ struct usb_hcd *hcd;
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+ struct resource *res;
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+ int irq;
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+ int retval;
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+
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+ pr_debug("initializing FOTG2XX-SOC USB Controller\n");
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+
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+ res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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+ if (!res) {
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+ dev_err(&pdev->dev,
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+ "Found HC with no IRQ. Check %s setup!\n",
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+ dev_name(&pdev->dev));
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+ return -ENODEV;
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+ }
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+
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+ irq = res->start;
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+
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+ hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
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+ if (!hcd) {
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+ retval = -ENOMEM;
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+ goto err1;
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+ }
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+
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (!res) {
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+ dev_err(&pdev->dev,
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+ "Found HC with no register addr. Check %s setup!\n",
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+ dev_name(&pdev->dev));
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+ retval = -ENODEV;
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+ goto err2;
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+ }
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+
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+ hcd->rsrc_start = res->start;
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+ hcd->rsrc_len = res->end - res->start + 1;
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+ if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
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+ driver->description)) {
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+ dev_dbg(&pdev->dev, "controller already in use\n");
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+ retval = -EBUSY;
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+ goto err2;
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+ }
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+
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+ hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
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+ if (hcd->regs == NULL) {
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+ dev_dbg(&pdev->dev, "error mapping memory\n");
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+ retval = -EFAULT;
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+ goto err3;
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+ }
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+
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+
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+ /* set global reg to mini-A host */
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+ writel(readl(IO_ADDRESS(0x40000000) + 0x30) & ~(BIT(30)|BIT(29)),
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+ IO_ADDRESS(0x40000000) + 0x30);
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+
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+ /* USB0&USB1 - VBUS off */
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+ writel(readl(IO_ADDRESS(0x40000000) + 0x30) & ~(BIT(21)|BIT(22)),
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+ IO_ADDRESS(0x40000000) + 0x30);
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+
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+ if ((readl(hcd->regs) == 0x01000010) &&
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+ (readl(hcd->regs + 4) == 0x00000001) &&
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+ (readl(hcd->regs + 8) == 0x00000006)) {
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+ dev_info(&pdev->dev,
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+ "Found Faraday OTG 2XX controller (base = 0x%08lX)\n",
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+ (unsigned long) hcd->rsrc_start);
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+ } else {
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+ dev_err(&pdev->dev, "fotg2xx id mismatch: found %d.%d.%d\n",
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+ readl(hcd->regs + 0x00),
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+ readl(hcd->regs + 0x04),
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+ readl(hcd->regs + 0x08));
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+ retval = -ENODEV;
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+ goto err4;
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+ }
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+
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+ platform_set_drvdata(pdev, hcd);
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+
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+ /* mask interrupts - peripheral, otg, host, hi-active (bits 0,1,2,3) */
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+ otg_set(0xc4, BIT(3)); /* hi active */
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+
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+ otg_set(0xc4, BIT(2)); /* host */
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+ otg_set(0xc4, BIT(1)); /* otg */
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+ otg_set(0xc4, BIT(0)); /* peripheral */
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+
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+ /* register additional interrupt - here we check otg status */
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+ if ((request_irq(irq, &fotg2xx_ehci_irq, IRQF_SHARED | IRQF_DISABLED,
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+ hcd->irq_descr, hcd)) != 0) {
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+ dev_dbg(&pdev->dev, "error requesting irq %d\n", irq);
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+ retval = -EFAULT;
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+ goto err4;
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+ }
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+
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+ retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
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+ if (retval != 0)
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+ goto err4;
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+ return retval;
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+
|
|
+err4:
|
|
+ iounmap(hcd->regs);
|
|
+err3:
|
|
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
|
|
+err2:
|
|
+ usb_put_hcd(hcd);
|
|
+err1:
|
|
+ dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
|
|
+ return retval;
|
|
+}
|
|
+
|
|
+/* may be called without controller electrically present */
|
|
+/* may be called with controller, bus, and devices active */
|
|
+
|
|
+int fotg2xx_ehci_remove(struct platform_device *pdev)
|
|
+{
|
|
+ struct usb_hcd *hcd =
|
|
+ (struct usb_hcd *)platform_get_drvdata(pdev);
|
|
+
|
|
+ usb_remove_hcd(hcd);
|
|
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
|
|
+ iounmap(hcd->regs);
|
|
+ usb_put_hcd(hcd);
|
|
+ platform_set_drvdata(pdev, NULL);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+MODULE_ALIAS("platform:ehci-fotg2xx");
|
|
+
|
|
+static struct platform_driver fotg2xx_ehci_driver = {
|
|
+ .probe = fotg2xx_ehci_probe,
|
|
+ .remove = fotg2xx_ehci_remove,
|
|
+ .driver = {
|
|
+ .name = "ehci-fotg2xx",
|
|
+ },
|
|
+};
|
|
--- a/drivers/usb/host/ehci.h
|
|
+++ b/drivers/usb/host/ehci.h
|
|
@@ -603,7 +603,12 @@ static inline unsigned int
|
|
ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
|
|
{
|
|
if (ehci_is_TDI(ehci)) {
|
|
+#ifdef CONFIG_ARCH_GEMINI
|
|
+ portsc = readl(ehci_to_hcd(ehci)->regs + 0x80);
|
|
+ switch ((portsc>>22)&3) {
|
|
+#else
|
|
switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
|
|
+#endif
|
|
case 0:
|
|
return 0;
|
|
case 1:
|
|
--- a/drivers/usb/host/ehci-hcd.c
|
|
+++ b/drivers/usb/host/ehci-hcd.c
|
|
@@ -204,10 +204,12 @@ static int ehci_halt (struct ehci_hcd *e
|
|
* This routine gets called during probe before ehci->command
|
|
* has been initialized, so we can't rely on its value.
|
|
*/
|
|
+#ifndef CONFIG_ARCH_GEMINI
|
|
ehci->command &= ~CMD_RUN;
|
|
temp = ehci_readl(ehci, &ehci->regs->command);
|
|
temp &= ~(CMD_RUN | CMD_IAAD);
|
|
ehci_writel(ehci, temp, &ehci->regs->command);
|
|
+#endif
|
|
|
|
spin_unlock_irq(&ehci->lock);
|
|
synchronize_irq(ehci_to_hcd(ehci)->irq);
|
|
@@ -257,13 +259,17 @@ static int ehci_reset (struct ehci_hcd *
|
|
if (ehci->has_hostpc) {
|
|
ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
|
|
&ehci->regs->usbmode_ex);
|
|
+#ifndef CONFIG_ARCH_GEMINI
|
|
ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
|
|
+#endif
|
|
}
|
|
if (retval)
|
|
return retval;
|
|
|
|
+#ifndef CONFIG_ARCH_GEMINI
|
|
if (ehci_is_TDI(ehci))
|
|
tdi_reset (ehci);
|
|
+#endif
|
|
|
|
if (ehci->debug)
|
|
dbgp_external_startup(ehci_to_hcd(ehci));
|
|
@@ -341,11 +347,14 @@ static void ehci_silence_controller(stru
|
|
ehci->rh_state = EHCI_RH_HALTED;
|
|
ehci_turn_off_all_ports(ehci);
|
|
|
|
+#ifndef CONFIG_ARCH_GEMINI
|
|
/* make BIOS/etc use companion controller during reboot */
|
|
ehci_writel(ehci, 0, &ehci->regs->configured_flag);
|
|
|
|
/* unblock posted writes */
|
|
ehci_readl(ehci, &ehci->regs->configured_flag);
|
|
+#endif
|
|
+
|
|
spin_unlock_irq(&ehci->lock);
|
|
}
|
|
|
|
@@ -603,7 +612,9 @@ static int ehci_run (struct usb_hcd *hcd
|
|
// Philips, Intel, and maybe others need CMD_RUN before the
|
|
// root hub will detect new devices (why?); NEC doesn't
|
|
ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
|
|
+#ifndef CONFIG_ARCH_GEMINI
|
|
ehci->command |= CMD_RUN;
|
|
+#endif
|
|
ehci_writel(ehci, ehci->command, &ehci->regs->command);
|
|
dbg_cmd (ehci, "init", ehci->command);
|
|
|
|
@@ -623,9 +634,11 @@ static int ehci_run (struct usb_hcd *hcd
|
|
*/
|
|
down_write(&ehci_cf_port_reset_rwsem);
|
|
ehci->rh_state = EHCI_RH_RUNNING;
|
|
+#ifndef CONFIG_ARCH_GEMINI
|
|
ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
|
|
ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
|
|
msleep(5);
|
|
+#endif /* !CONFIG_ARCH_GEMINI */
|
|
up_write(&ehci_cf_port_reset_rwsem);
|
|
ehci->last_periodic_enable = ktime_get_real();
|
|
|
|
@@ -1228,6 +1241,11 @@ MODULE_DESCRIPTION(DRIVER_DESC);
|
|
MODULE_AUTHOR (DRIVER_AUTHOR);
|
|
MODULE_LICENSE ("GPL");
|
|
|
|
+#ifdef CONFIG_ARCH_GEMINI
|
|
+#include "ehci-fotg2xx.c"
|
|
+#define PLATFORM_DRIVER fotg2xx_ehci_driver
|
|
+#endif
|
|
+
|
|
#ifdef CONFIG_USB_EHCI_FSL
|
|
#include "ehci-fsl.c"
|
|
#define PLATFORM_DRIVER ehci_fsl_driver
|
|
--- a/drivers/usb/host/ehci-hub.c
|
|
+++ b/drivers/usb/host/ehci-hub.c
|
|
@@ -914,6 +914,12 @@ static int ehci_hub_control (
|
|
/* see what we found out */
|
|
temp = check_reset_complete (ehci, wIndex, status_reg,
|
|
ehci_readl(ehci, status_reg));
|
|
+#ifdef CONFIG_ARCH_GEMINI
|
|
+ /* restart schedule */
|
|
+ ehci_writel(ehci, ehci_readl(ehci, &ehci->regs->command) | CMD_RUN, &ehci->regs->command);
|
|
+
|
|
+// hcd->state = HC_STATE_RUNNING;
|
|
+#endif
|
|
}
|
|
|
|
if (!(temp & (PORT_RESUME|PORT_RESET))) {
|
|
--- a/drivers/usb/Kconfig
|
|
+++ b/drivers/usb/Kconfig
|
|
@@ -47,6 +47,7 @@ config USB_ARCH_HAS_EHCI
|
|
default y if MICROBLAZE
|
|
default y if SPARC_LEON
|
|
default y if ARCH_MMP
|
|
+ default y if ARCH_GEMINI
|
|
default y if MACH_LOONGSON1
|
|
default y if PLAT_ORION
|
|
default PCI
|
|
@@ -96,7 +97,7 @@ config USB
|
|
traditional PC serial port. The bus supplies power to peripherals
|
|
and allows for hot swapping. Up to 127 USB peripherals can be
|
|
connected to a single USB host in a tree structure.
|
|
-
|
|
+
|
|
The USB host is the root of the tree, the peripherals are the
|
|
leaves and the inner nodes are special USB devices called hubs.
|
|
Most PCs now have USB host ports, used to connect peripherals
|
|
--- a/include/linux/usb/ehci_def.h
|
|
+++ b/include/linux/usb/ehci_def.h
|
|
@@ -111,6 +111,7 @@ struct ehci_regs {
|
|
/* ASYNCLISTADDR: offset 0x18 */
|
|
u32 async_next; /* address of next async queue head */
|
|
|
|
+#ifndef CONFIG_ARCH_GEMINI
|
|
u32 reserved1[2];
|
|
|
|
/* TXFILLTUNING: offset 0x24 */
|
|
@@ -118,6 +119,7 @@ struct ehci_regs {
|
|
#define TXFIFO_DEFAULT (8<<16) /* FIFO burst threshold 8 */
|
|
|
|
u32 reserved2[6];
|
|
+#endif /* !CONFIG_ARCH_GEMINI */
|
|
|
|
/* CONFIGFLAG: offset 0x40 */
|
|
u32 configured_flag;
|