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8f8d5decc9
Removed because they are upstream:
generic/backport-5.15/704-15-v5.19-net-mtk_eth_soc-move-MAC_MCR-setting-to-mac_finish.patch
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.15.y&id=c5c0760adc260d55265c086b9efb350ea6dda38b
generic/pending-5.15/735-net-mediatek-mtk_eth_soc-release-MAC_MCR_FORCE_LINK-.patch
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.15.y&id=448cc8b5f743985f6d1d98aa4efb386fef4c3bf2
generic/pending-5.15/736-net-ethernet-mtk_eth_soc-fix-PPE-hanging-issue.patch
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.15.y&id=9fcadd125044007351905d40c405fadc2d3bb6d6
Add new configuration symbols for tegra target.
Tested-by: Stijn Segers <foss@volatilesystems.org>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit fb2c6e9d4d
)
207 lines
6.2 KiB
Diff
207 lines
6.2 KiB
Diff
From: Lorenzo Bianconi <lorenzo@kernel.org>
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Date: Fri, 20 May 2022 20:11:27 +0200
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Subject: [PATCH] net: ethernet: mtk_eth_soc: move tx dma desc configuration in
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mtk_tx_set_dma_desc
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Move tx dma descriptor configuration in mtk_tx_set_dma_desc routine.
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This is a preliminary patch to introduce mt7986 ethernet support since
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it relies on a different tx dma descriptor layout.
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Tested-by: Sam Shih <sam.shih@mediatek.com>
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Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -982,18 +982,51 @@ static void setup_tx_buf(struct mtk_eth
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}
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}
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+static void mtk_tx_set_dma_desc(struct net_device *dev, struct mtk_tx_dma *desc,
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+ struct mtk_tx_dma_desc_info *info)
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+{
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+ struct mtk_mac *mac = netdev_priv(dev);
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+ u32 data;
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+
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+ WRITE_ONCE(desc->txd1, info->addr);
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+
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+ data = TX_DMA_SWC | TX_DMA_PLEN0(info->size);
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+ if (info->last)
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+ data |= TX_DMA_LS0;
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+ WRITE_ONCE(desc->txd3, data);
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+
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+ data = (mac->id + 1) << TX_DMA_FPORT_SHIFT; /* forward port */
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+ if (info->first) {
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+ if (info->gso)
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+ data |= TX_DMA_TSO;
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+ /* tx checksum offload */
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+ if (info->csum)
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+ data |= TX_DMA_CHKSUM;
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+ /* vlan header offload */
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+ if (info->vlan)
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+ data |= TX_DMA_INS_VLAN | info->vlan_tci;
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+ }
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+ WRITE_ONCE(desc->txd4, data);
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+}
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+
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static int mtk_tx_map(struct sk_buff *skb, struct net_device *dev,
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int tx_num, struct mtk_tx_ring *ring, bool gso)
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{
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+ struct mtk_tx_dma_desc_info txd_info = {
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+ .size = skb_headlen(skb),
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+ .gso = gso,
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+ .csum = skb->ip_summed == CHECKSUM_PARTIAL,
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+ .vlan = skb_vlan_tag_present(skb),
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+ .vlan_tci = skb_vlan_tag_get(skb),
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+ .first = true,
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+ .last = !skb_is_nonlinear(skb),
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+ };
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struct mtk_mac *mac = netdev_priv(dev);
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struct mtk_eth *eth = mac->hw;
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struct mtk_tx_dma *itxd, *txd;
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struct mtk_tx_dma *itxd_pdma, *txd_pdma;
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struct mtk_tx_buf *itx_buf, *tx_buf;
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- dma_addr_t mapped_addr;
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- unsigned int nr_frags;
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int i, n_desc = 1;
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- u32 txd4 = 0, fport;
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int k = 0;
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itxd = ring->next_free;
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@@ -1001,49 +1034,32 @@ static int mtk_tx_map(struct sk_buff *sk
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if (itxd == ring->last_free)
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return -ENOMEM;
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- /* set the forward port */
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- fport = (mac->id + 1) << TX_DMA_FPORT_SHIFT;
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- txd4 |= fport;
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-
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itx_buf = mtk_desc_to_tx_buf(ring, itxd);
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memset(itx_buf, 0, sizeof(*itx_buf));
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- if (gso)
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- txd4 |= TX_DMA_TSO;
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-
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- /* TX Checksum offload */
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- if (skb->ip_summed == CHECKSUM_PARTIAL)
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- txd4 |= TX_DMA_CHKSUM;
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-
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- /* VLAN header offload */
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- if (skb_vlan_tag_present(skb))
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- txd4 |= TX_DMA_INS_VLAN | skb_vlan_tag_get(skb);
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-
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- mapped_addr = dma_map_single(eth->dma_dev, skb->data,
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- skb_headlen(skb), DMA_TO_DEVICE);
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- if (unlikely(dma_mapping_error(eth->dma_dev, mapped_addr)))
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+ txd_info.addr = dma_map_single(eth->dma_dev, skb->data, txd_info.size,
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+ DMA_TO_DEVICE);
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+ if (unlikely(dma_mapping_error(eth->dma_dev, txd_info.addr)))
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return -ENOMEM;
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- WRITE_ONCE(itxd->txd1, mapped_addr);
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+ mtk_tx_set_dma_desc(dev, itxd, &txd_info);
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+
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itx_buf->flags |= MTK_TX_FLAGS_SINGLE0;
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itx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 :
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MTK_TX_FLAGS_FPORT1;
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- setup_tx_buf(eth, itx_buf, itxd_pdma, mapped_addr, skb_headlen(skb),
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+ setup_tx_buf(eth, itx_buf, itxd_pdma, txd_info.addr, txd_info.size,
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k++);
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/* TX SG offload */
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txd = itxd;
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txd_pdma = qdma_to_pdma(ring, txd);
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- nr_frags = skb_shinfo(skb)->nr_frags;
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- for (i = 0; i < nr_frags; i++) {
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+ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
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skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
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unsigned int offset = 0;
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int frag_size = skb_frag_size(frag);
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while (frag_size) {
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- bool last_frag = false;
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- unsigned int frag_map_size;
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bool new_desc = true;
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if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA) ||
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@@ -1058,23 +1074,17 @@ static int mtk_tx_map(struct sk_buff *sk
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new_desc = false;
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}
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-
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- frag_map_size = min(frag_size, MTK_TX_DMA_BUF_LEN);
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- mapped_addr = skb_frag_dma_map(eth->dma_dev, frag, offset,
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- frag_map_size,
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- DMA_TO_DEVICE);
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- if (unlikely(dma_mapping_error(eth->dma_dev, mapped_addr)))
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+ memset(&txd_info, 0, sizeof(struct mtk_tx_dma_desc_info));
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+ txd_info.size = min(frag_size, MTK_TX_DMA_BUF_LEN);
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+ txd_info.last = i == skb_shinfo(skb)->nr_frags - 1 &&
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+ !(frag_size - txd_info.size);
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+ txd_info.addr = skb_frag_dma_map(eth->dma_dev, frag,
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+ offset, txd_info.size,
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+ DMA_TO_DEVICE);
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+ if (unlikely(dma_mapping_error(eth->dma_dev, txd_info.addr)))
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goto err_dma;
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- if (i == nr_frags - 1 &&
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- (frag_size - frag_map_size) == 0)
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- last_frag = true;
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-
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- WRITE_ONCE(txd->txd1, mapped_addr);
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- WRITE_ONCE(txd->txd3, (TX_DMA_SWC |
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- TX_DMA_PLEN0(frag_map_size) |
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- last_frag * TX_DMA_LS0));
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- WRITE_ONCE(txd->txd4, fport);
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+ mtk_tx_set_dma_desc(dev, txd, &txd_info);
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tx_buf = mtk_desc_to_tx_buf(ring, txd);
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if (new_desc)
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@@ -1084,20 +1094,17 @@ static int mtk_tx_map(struct sk_buff *sk
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tx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 :
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MTK_TX_FLAGS_FPORT1;
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- setup_tx_buf(eth, tx_buf, txd_pdma, mapped_addr,
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- frag_map_size, k++);
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+ setup_tx_buf(eth, tx_buf, txd_pdma, txd_info.addr,
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+ txd_info.size, k++);
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- frag_size -= frag_map_size;
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- offset += frag_map_size;
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+ frag_size -= txd_info.size;
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+ offset += txd_info.size;
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}
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}
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/* store skb to cleanup */
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itx_buf->skb = skb;
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- WRITE_ONCE(itxd->txd4, txd4);
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- WRITE_ONCE(itxd->txd3, (TX_DMA_SWC | TX_DMA_PLEN0(skb_headlen(skb)) |
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- (!nr_frags * TX_DMA_LS0)));
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if (!MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
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if (k & 0x1)
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txd_pdma->txd2 |= TX_DMA_LS0;
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -843,6 +843,17 @@ enum mkt_eth_capabilities {
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MTK_MUX_U3_GMAC2_TO_QPHY | \
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MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA)
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+struct mtk_tx_dma_desc_info {
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+ dma_addr_t addr;
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+ u32 size;
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+ u16 vlan_tci;
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+ u8 gso:1;
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+ u8 csum:1;
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+ u8 vlan:1;
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+ u8 first:1;
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+ u8 last:1;
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+};
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+
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/* struct mtk_eth_data - This is the structure holding all differences
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* among various plaforms
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* @ana_rgc3: The offset for register ANA_RGC3 related to
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