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The 1st generation MediaTek PCIe host bridge cannot handle Message Signaled Interrupts (MSIs). The core PCI code is not aware that MSI is not available. This results in warnings of the form: WARNING: CPU: 2 PID: 112 at include/linux/msi.h:219 pci_msi_setup_msi_irqs.constprop.8+0x64/0x6c Modules linked in: ahci(+) libahci libata sd_mod scsi_mod gpio_button_hotplug CPU: 2 PID: 112 Comm: kmodloader Not tainted 5.10.52 #0 Hardware name: Mediatek Cortex-A7 (Device Tree) Import patches that introduce the 'no_msi' attribute to signal missing MSI support to the core PCI. Refresh patches: - 000-spi-fix-fifo.patch - 330-mtk-bmt-support.patch - 510-net-mediatek-add-flow-offload-for-mt7623.patch - 601-PCI-mediatek-Use-regmap-to-get-shared-pcie-cfg-base.patch - 610-pcie-mediatek-fix-clearing-interrupt-status.patch - 700-net-ethernet-mtk_eth_soc-add-support-for-coherent-DM.patch - 710-pci-pcie-mediatek-add-support-for-coherent-DMA.patch Signed-off-by: Nick Hainke <vincent@systemli.org>
60 lines
2.2 KiB
Diff
60 lines
2.2 KiB
Diff
From 645e9c38383d7fcde2784ee537fa18ec9bed54d9 Mon Sep 17 00:00:00 2001
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From: Thomas Gleixner <tglx@linutronix.de>
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Date: Tue, 30 Mar 2021 16:11:43 +0100
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Subject: PCI: mediatek: Advertise lack of built-in MSI handling
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Some Mediatek host bridges cannot handle MSIs, which is sad.
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This also results in an ugly warning at device probe time,
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as the core PCI code wasn't told that MSIs were not available.
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Advertise this fact to the rest of the core PCI code by
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using the 'msi_domain' attribute, which still opens the possibility
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for another block to provide the MSI functionnality.
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[maz: commit message, switched over to msi_domain attribute]
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Link: https://lore.kernel.org/r/20210330151145.997953-13-maz@kernel.org
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Reported-by: Frank Wunderlich <frank-w@public-files.de>
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Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Signed-off-by: Marc Zyngier <maz@kernel.org>
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Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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Acked-by: Bjorn Helgaas <bhelgaas@google.com>
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---
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drivers/pci/controller/pcie-mediatek.c | 4 ++++
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1 file changed, 4 insertions(+)
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--- a/drivers/pci/controller/pcie-mediatek.c
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+++ b/drivers/pci/controller/pcie-mediatek.c
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@@ -143,6 +143,7 @@ struct mtk_pcie_port;
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* struct mtk_pcie_soc - differentiate between host generations
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* @need_fix_class_id: whether this host's class ID needed to be fixed or not
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* @need_fix_device_id: whether this host's device ID needed to be fixed or not
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+ * @no_msi: Bridge has no MSI support, and relies on an external block
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* @device_id: device ID which this host need to be fixed
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* @ops: pointer to configuration access functions
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* @startup: pointer to controller setting functions
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@@ -151,6 +152,7 @@ struct mtk_pcie_port;
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struct mtk_pcie_soc {
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bool need_fix_class_id;
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bool need_fix_device_id;
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+ bool no_msi;
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unsigned int device_id;
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struct pci_ops *ops;
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int (*startup)(struct mtk_pcie_port *port);
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@@ -1087,6 +1089,7 @@ static int mtk_pcie_probe(struct platfor
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host->ops = pcie->soc->ops;
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host->sysdata = pcie;
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+ host->msi_domain = pcie->soc->no_msi;
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err = pci_host_probe(host);
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if (err)
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@@ -1176,6 +1179,7 @@ static const struct dev_pm_ops mtk_pcie_
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};
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static const struct mtk_pcie_soc mtk_pcie_soc_v1 = {
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+ .no_msi = true,
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.ops = &mtk_pcie_ops,
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.startup = mtk_pcie_startup_port,
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};
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