mirror of
https://github.com/openwrt/openwrt.git
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89 lines
2.6 KiB
Diff
89 lines
2.6 KiB
Diff
Index: linux-3.10.32/arch/mips/ralink/rt288x.c
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===================================================================
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--- linux-3.10.32.orig/arch/mips/ralink/rt288x.c 2014-02-22 20:41:54.000000000 +0000
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+++ linux-3.10.32/arch/mips/ralink/rt288x.c 2014-03-18 11:18:06.689596876 +0000
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@@ -17,46 +17,27 @@
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#include <asm/mipsregs.h>
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#include <asm/mach-ralink/ralink_regs.h>
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#include <asm/mach-ralink/rt288x.h>
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+#include <asm/mach-ralink/pinmux.h>
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#include "common.h"
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-static struct ralink_pinmux_grp mode_mux[] = {
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- {
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- .name = "i2c",
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- .mask = RT2880_GPIO_MODE_I2C,
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- .gpio_first = 1,
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- .gpio_last = 2,
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- }, {
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- .name = "spi",
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- .mask = RT2880_GPIO_MODE_SPI,
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- .gpio_first = 3,
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- .gpio_last = 6,
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- }, {
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- .name = "uartlite",
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- .mask = RT2880_GPIO_MODE_UART0,
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- .gpio_first = 7,
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- .gpio_last = 14,
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- }, {
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- .name = "jtag",
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- .mask = RT2880_GPIO_MODE_JTAG,
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- .gpio_first = 17,
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- .gpio_last = 21,
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- }, {
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- .name = "mdio",
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- .mask = RT2880_GPIO_MODE_MDIO,
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- .gpio_first = 22,
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- .gpio_last = 23,
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- }, {
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- .name = "sdram",
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- .mask = RT2880_GPIO_MODE_SDRAM,
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- .gpio_first = 24,
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- .gpio_last = 39,
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- }, {
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- .name = "pci",
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- .mask = RT2880_GPIO_MODE_PCI,
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- .gpio_first = 40,
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- .gpio_last = 71,
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- }, {0}
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+static struct rt2880_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) };
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+static struct rt2880_pmx_func spi_func[] = { FUNC("spi", 0, 3, 6) };
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+static struct rt2880_pmx_func uartlite_func[] = { FUNC("uartlite", 0, 7, 14) };
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+static struct rt2880_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 21) };
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+static struct rt2880_pmx_func mdio_func[] = { FUNC("mdio", 0, 22, 23) };
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+static struct rt2880_pmx_func sdram_func[] = { FUNC("sdram", 0, 24, 39) };
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+static struct rt2880_pmx_func pci_func[] = { FUNC("pci", 0, 40, 71) };
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+
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+static struct rt2880_pmx_group rt2880_pinmux_data_act[] = {
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+ GRP("i2c", i2c_func, 1, RT2880_GPIO_MODE_I2C),
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+ GRP("spi", spi_func, 1, RT2880_GPIO_MODE_SPI),
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+ GRP("uartlite", uartlite_func, 1, RT2880_GPIO_MODE_UART0),
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+ GRP("jtag", jtag_func, 1, RT2880_GPIO_MODE_JTAG),
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+ GRP("mdio", mdio_func, 1, RT2880_GPIO_MODE_MDIO),
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+ GRP("sdram", sdram_func, 1, RT2880_GPIO_MODE_SDRAM),
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+ GRP("pci", pci_func, 1, RT2880_GPIO_MODE_PCI),
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+ { 0 }
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};
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static void rt288x_wdt_reset(void)
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@@ -69,11 +50,6 @@
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rt_sysc_w32(t, SYSC_REG_CLKCFG);
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}
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-struct ralink_pinmux rt_gpio_pinmux = {
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- .mode = mode_mux,
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- .wdt_reset = rt288x_wdt_reset,
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-};
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-
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void __init ralink_clk_init(void)
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{
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unsigned long cpu_rate;
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@@ -140,4 +116,6 @@
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soc_info->mem_base = RT2880_SDRAM_BASE;
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soc_info->mem_size_min = RT2880_MEM_SIZE_MIN;
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soc_info->mem_size_max = RT2880_MEM_SIZE_MAX;
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+
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+ rt2880_pinmux_data = rt2880_pinmux_data_act;
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}
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