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02629d8f87
Targets were build tested and patches are refreshed. Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 42463
59 lines
1.9 KiB
Diff
59 lines
1.9 KiB
Diff
From 9ab5cb48696dca02bf43170b50d1034a96fb9e85 Mon Sep 17 00:00:00 2001
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From: Andy Gross <agross@codeaurora.org>
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Date: Sun, 15 Jun 2014 00:39:57 -0500
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Subject: [PATCH 155/182] clk: qcom: Fix incorrect UTMI DT include values
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Corrected values for UTMI clock definitions.
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Signed-off-by: Andy Gross <agross@codeaurora.org>
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---
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include/dt-bindings/clock/qcom,gcc-ipq806x.h | 38 +++++++++++++-------------
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1 file changed, 19 insertions(+), 19 deletions(-)
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--- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
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+++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
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@@ -273,24 +273,24 @@
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#define USB30_SLEEP_CLK 262
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#define USB30_UTMI_SRC 263
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#define USB30_0_UTMI_CLK 264
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-#define USB30_1_UTMI_CLK 264
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-#define USB30_MASTER_SRC 265
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-#define USB30_0_MASTER_CLK 266
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-#define USB30_1_MASTER_CLK 267
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-#define GMAC_CORE1_CLK_SRC 268
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-#define GMAC_CORE2_CLK_SRC 269
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-#define GMAC_CORE3_CLK_SRC 270
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-#define GMAC_CORE4_CLK_SRC 271
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-#define GMAC_CORE1_CLK 272
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-#define GMAC_CORE2_CLK 273
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-#define GMAC_CORE3_CLK 274
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-#define GMAC_CORE4_CLK 275
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-#define UBI32_CORE1_CLK_SRC 276
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-#define UBI32_CORE2_CLK_SRC 277
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-#define UBI32_CORE1_CLK 278
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-#define UBI32_CORE2_CLK 279
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-#define NSSTCM_CLK_SRC 280
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-#define NSSTCM_CLK 281
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-#define NSS_CORE_CLK 282 /* Virtual */
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+#define USB30_1_UTMI_CLK 265
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+#define USB30_MASTER_SRC 266
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+#define USB30_0_MASTER_CLK 267
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+#define USB30_1_MASTER_CLK 268
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+#define GMAC_CORE1_CLK_SRC 269
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+#define GMAC_CORE2_CLK_SRC 270
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+#define GMAC_CORE3_CLK_SRC 271
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+#define GMAC_CORE4_CLK_SRC 272
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+#define GMAC_CORE1_CLK 273
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+#define GMAC_CORE2_CLK 274
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+#define GMAC_CORE3_CLK 275
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+#define GMAC_CORE4_CLK 276
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+#define UBI32_CORE1_CLK_SRC 277
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+#define UBI32_CORE2_CLK_SRC 278
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+#define UBI32_CORE1_CLK 279
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+#define UBI32_CORE2_CLK 280
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+#define NSSTCM_CLK_SRC 281
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+#define NSSTCM_CLK 282
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+#define NSS_CORE_CLK 283 /* Virtual */
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#endif
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