openwrt/target/linux/bcm27xx/patches-6.6/950-0853-drivers-usb-dwc3-add-FS-LS-bus-instance-parkmode-dis.patch
Álvaro Fernández Rojas 8c405cdccc bcm27xx: add 6.6 kernel patches
The patches were generated from the RPi repo with the following command:
git format-patch v6.6.34..rpi-6.1.y

Some patches needed rebasing and, as usual, the applied and reverted, wireless
drivers, Github workflows, READMEs and defconfigs patches were removed.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2024-06-18 18:52:49 +02:00

73 lines
2.9 KiB
Diff

From 20684f46eb962173b57ba2d70f9f2e028c95c4c9 Mon Sep 17 00:00:00 2001
From: Jonathan Bell <jonathan@raspberrypi.com>
Date: Wed, 24 Jan 2024 16:28:19 +0000
Subject: [PATCH 0853/1085] drivers: usb: dwc3: add FS/LS bus instance parkmode
disable bit
There are three parkmode disable bits, one for each bus instance type.
Add FS/LS and parse the quirk out of DT. Also update the slightly
mangled quirk descriptions.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
---
drivers/usb/dwc3/core.c | 5 +++++
drivers/usb/dwc3/core.h | 12 ++++++++----
2 files changed, 13 insertions(+), 4 deletions(-)
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -1312,6 +1312,9 @@ static int dwc3_core_init(struct dwc3 *d
if (dwc->parkmode_disable_hs_quirk)
reg |= DWC3_GUCTL1_PARKMODE_DISABLE_HS;
+ if (dwc->parkmode_disable_fsls_quirk)
+ reg |= DWC3_GUCTL1_PARKMODE_DISABLE_FSLS;
+
if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY) &&
(dwc->maximum_speed == USB_SPEED_HIGH ||
dwc->maximum_speed == USB_SPEED_FULL))
@@ -1610,6 +1613,8 @@ static void dwc3_get_properties(struct d
"snps,parkmode-disable-ss-quirk");
dwc->parkmode_disable_hs_quirk = device_property_read_bool(dev,
"snps,parkmode-disable-hs-quirk");
+ dwc->parkmode_disable_fsls_quirk = device_property_read_bool(dev,
+ "snps,parkmode-disable-fsls-quirk");
dwc->gfladj_refclk_lpm_sel = device_property_read_bool(dev,
"snps,gfladj-refclk-lpm-sel-quirk");
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -271,6 +271,7 @@
#define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW BIT(24)
#define DWC3_GUCTL1_PARKMODE_DISABLE_SS BIT(17)
#define DWC3_GUCTL1_PARKMODE_DISABLE_HS BIT(16)
+#define DWC3_GUCTL1_PARKMODE_DISABLE_FSLS BIT(15)
#define DWC3_GUCTL1_RESUME_OPMODE_HS_HOST BIT(10)
/* Global Status Register */
@@ -1115,10 +1116,12 @@ struct dwc3_scratchpad_array {
* generation after resume from suspend.
* @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
* VBUS with an external supply.
- * @parkmode_disable_ss_quirk: set if we need to disable all SuperSpeed
- * instances in park mode.
- * @parkmode_disable_hs_quirk: set if we need to disable all HishSpeed
- * instances in park mode.
+ * @parkmode_disable_ss_quirk: If set, disable park mode feature for all
+ * Superspeed instances.
+ * @parkmode_disable_hs_quirk: If set, disable park mode feature for all
+ * Highspeed instances.
+ * @parkmode_disable_fsls_quirk: If set, disable park mode feature for all
+ * Full/Lowspeed instances.
* @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
* @tx_de_emphasis: Tx de-emphasis value
* 0 - -6dB de-emphasis
@@ -1341,6 +1344,7 @@ struct dwc3 {
unsigned ulpi_ext_vbus_drv:1;
unsigned parkmode_disable_ss_quirk:1;
unsigned parkmode_disable_hs_quirk:1;
+ unsigned parkmode_disable_fsls_quirk:1;
unsigned gfladj_refclk_lpm_sel:1;
unsigned tx_de_emphasis_quirk:1;